FPGA Associate - Space Hardware (Winter 2027)

Astranis Space Technologies

San Francisco (CA)

On-site

USD 74,000 - 101,000

Full time

9 days ago
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Job summary

Astranis Space Technologies in the San Francisco area is seeking an FPGA Associate (Winter 2027). This paid associate program is a twelve-week, entry-level role designed for new grads, with opportunities to contribute to hardware and software that will fly on our first satellite.

You will perform RTL development for FPGA-targeted applications, work across multiple FPGAs and toolchains, and collaborate with electrical and software engineers to test interfaces and performance.

Qualifications

  • Hold a B.S. or M.S. in electrical engineering, computer science, computer engineering, or equivalent.
  • A passion for hardware development, including working in a fast-paced environment and hands-on design and development.
  • Experience in designing, implementing, and testing high throughput systems implemented on FPGAs.
  • Proficiency with Verilog/SystemVerilog for synthesis.

Responsibilities

  • RTL development for FPGA-targeted applications.
  • Work with multiple FPGAs and toolchains.
  • Interface FPGAs with a variety of peripherals including high speed data converters, memories, MCUs.
  • Write software to interface and test RTL in hardware.
  • Collaborate closely with electrical and software engineers.

Skills

FPGA design
RTL development
Verilog/SystemVerilog
High throughput systems

Education

B.S. or M.S. in EE/CS/CE

Tools

Verilog/SystemVerilog tooling
Vivado IDE
TCL
Xilinx FPGAs

Job description

Astranis Space Technologies in the San Francisco area is seeking an FPGA Associate (Winter 2027). This paid associate program is a twelve-week, entry-level role designed for new grads, with opportunities to contribute to hardware and software that will fly on our first satellite.

You will perform RTL development for FPGA-targeted applications, work across multiple FPGAs and toolchains, and collaborate with electrical and software engineers to test interfaces and performance.

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