Space FPGA Engineer — RTL/Verilog, High-Throughput

Astranis Space Technologies Corp.; San Francisco (CA); On-site; USD 140,000 - 205,000; Full time

Benefits offered by this job

Equity package via incentive stock options

Company-subsidized healthcare

Flexible PTO

On-site catered meals

Job summary

Astranis Space Technologies Corp. in San Francisco is hiring an FPGA Engineer responsible for designing and testing RTL for FPGA systems. The role involves working closely with software, DSP, and hardware teams to meet design requirements.

The ideal candidate will have at least 2 years of FPGA experience, proficiency in Verilog/SystemVerilog, and a passion for hardware development. Competitive compensation package includes base pay and equity.

Qualifications

• 2+ years of experience in FPGA design and development.
• Strong proficiency with Verilog/SystemVerilog.
• Experience in high throughput systems.

Responsibilities

• Design RTL for high performance FPGA systems.
• Interface FPGAs with high speed data converters.
• Collaborate with DSP and firmware engineers.

Skills

Verilog/SystemVerilog

FPGA design and verification

Experience with Xilinx FPGAs

Hands-on hardware development

Education

Bachelor of Science degree in electrical engineering, computer science or equivalent

Tools

Vivado IDE

TCL

Job description

Astranis Space Technologies Corp. in San Francisco is hiring an FPGA Engineer responsible for designing and testing RTL for FPGA systems. The role involves working closely with software, DSP, and hardware teams to meet design requirements.

The ideal candidate will have at least 2 years of FPGA experience, proficiency in Verilog/SystemVerilog, and a passion for hardware development. Competitive compensation package includes base pay and equity.