SoC RTL Design Engineer — High-Performance SSDs

SK hynix memory solutions; San Jose (CA); On-site; USD 110,000 - 170,000; Full time

Benefits offered by this job

Medical, dental, vision

Life insurance

401(k) match

Onsite gym

Cafeteria

Job summary

SK hynix memory solutions America invites engineers to join the System on Chip (SoC) Design Team in San Jose. You will contribute to high‑performance SSD controllers across the design cycle from micro-architecture to tapeout readiness.

Ideal candidates have a BS/MS/PhD in Electrical/Computer Engineering, strong RTL Verilog/SystemVerilog skills, and familiarity with AMBA, PCIe, NAND, DDR protocols. The role is on site with a competitive compensation package and comprehensive benefits.

Qualifications

• BS/MS/PhD in Electrical/Computer Engineering or related field.
• Proficient in logic design, micro-architecture; RTL coding in Verilog/SystemVerilog.
• Experience with digital design verification and protocols (AMBA, PCIe, DDR).

Responsibilities

• RTL design (Verilog/SystemVerilog) for IP-based modules.
• Collaborate with Design Verification, Silicon Validation, and Firmware teams to ensure design quality.

Skills

RTL design

Verilog/SystemVerilog

Documentation

Team collaboration

Python scripting

Linux

Education

BS/MS/PhD in Electrical/Computer Engineering

Job description

SK hynix memory solutions America invites engineers to join the System on Chip (SoC) Design Team in San Jose. You will contribute to high‑performance SSD controllers across the design cycle from micro-architecture to tapeout readiness.

Ideal candidates have a BS/MS/PhD in Electrical/Computer Engineering, strong RTL Verilog/SystemVerilog skills, and familiarity with AMBA, PCIe, NAND, DDR protocols. The role is on site with a competitive compensation package and comprehensive benefits.