SoC Power Lead: Memory Subsystem & Power Optimizations

Google LLC; Mountain View (CA); Presencial; USD 192.000 - 278.000; Jornada completa

Descripción de la vacante

Google LLC in Mountain View, CA is seeking a senior hardware engineer focused on memory subsystem power for Tensor mobile SoCs. You will lead the definition of power requirements to achieve Power-Performance-Area targets and drive cross-functional teams to deliver memory IP with optimal energy efficiency.

The role emphasizes memory architecture, LPDDR standards, and performance modeling across the full product lifecycle. Individual pay is determined by skills, experience, and education.

Formación

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field required.
• 10 years of experience with memory subsystem architectures for mobile SoCs.
• Experience in power management and low power design/methodology.
• Experience with full product delivery cycle from concept to mass productization.

Responsabilidades

• Lead the definition of power requirements for Tensor mobile SoCs to achieve PPA with focus on memory subsystem.
• Own and drive cross-functional teams to deliver memory subsystem KPIs.
• Propose and drive power optimizations for memory subsystem throughout design process.
• Drive power–performance trade-off analysis for engineering reviews and roadmap decisions.
• Represent SoC power status to the executive leadership team.

Conocimientos

Memory subsystems

Power management

Power optimization techniques

Cross-functional leadership

Product delivery lifecycle

Educación

Bachelor’s degree in EE/CE/CS or related field

Master’s degree or PhD in EE/CE/CS

Descripción del empleo

Google LLC in Mountain View, CA is seeking a senior hardware engineer focused on memory subsystem power for Tensor mobile SoCs. You will lead the definition of power requirements to achieve Power-Performance-Area targets and drive cross-functional teams to deliver memory IP with optimal energy efficiency.

The role emphasizes memory architecture, LPDDR standards, and performance modeling across the full product lifecycle. Individual pay is determined by skills, experience, and education.