SoC Infra & NoC Power-Perf Validation Eng

QUALCOMM, Inc.; Santa Clara (CA); In loco; USD 122.000 - 183.000; Tempo pieno

Descrizione del lavoro

Qualcomm Technologies, Inc. is seeking a seasoned ASIC validation engineer for SOC Infrastructure/NoC, Power and Performance validation in pre-silicon emulation and post-silicon.

You will analyze on-chip interconnects, bus architectures and memory hierarchy to ensure quality of the SoC. The role requires strong C/C++, Python and assembly skills, experience with JTAG debuggers, debug tools, and designing validation content and drivers.

Competenze

• Bachelor's degree with 5+ years in ASIC design/validation or equivalent.
• Advanced degrees also covered with prog. experience as stated.
• Strong background in digital design, bus architectures and power/perf analysis.

Conoscenze

SOC Bandwidth

NoCs/AXI/AMBA

FIFO designs

Power-Performance validation

Embedded systems

C/C++

Python

Assembly

JTAG debugging

Kernel debuggers

Generative AI for workflows

Formazione

Bachelor's degree in Science/Engineering

Master's degree in Science/Engineering

PhD in Science/Engineering

Strumenti

JTAG

Kernel debuggers

Descrizione del lavoro

Qualcomm Technologies, Inc. is seeking a seasoned ASIC validation engineer for SOC Infrastructure/NoC, Power and Performance validation in pre-silicon emulation and post-silicon.

You will analyze on-chip interconnects, bus architectures and memory hierarchy to ensure quality of the SoC. The role requires strong C/C++, Python and assembly skills, experience with JTAG debuggers, debug tools, and designing validation content and drivers.