Post-Silicon Validation Engineer: SoC Debug & Emulation

QUALCOMM, Inc.; San Diego (CA); Sur place; USD 101 000 - 152 000; Plein temps

Résumé du poste

Qualcomm Technologies, Inc. in San Diego seeks a PST Validation Engineer to drive post-silicon validation, emulation, and IP verification across SoCs. The role requires strong C/Python skills, JTAG debugging, and hands-on silicon bring-up experience.

You will collaborate with CAD, RTL, and design teams to optimize validation workflows, build test benches, and ensure high-quality, low-power ASIC delivery.

Qualifications

• Bachelor's, Master's, or PhD in a science/engineering field with 2+ years ASIC design/verification experience.
• Strong C and Python programming, plus debugging with JTAG and kernel debuggers.
• Experience in architecture/test bench development and emulation across CPU/SoC platforms.

Responsabilités

• Perform Silicon bring-up, measure and analyze PVT data across IPs.
• Debug low-level software/hardware issues using JTAG and kernel debuggers.
• Manage emulation builds, run tests, identify failures, and coordinate with CAD/RTL teams.
• Automate validation flows and data collection using Python or similar scripting.

Connaissances

C programming

Python

JTAG

Kernel debugging

Formation

Bachelor's degree in Science/Engineering

Master's degree in Science/Engineering

PhD in Science/Engineering

Outils

Lauterbach Trace32

Description du poste

Qualcomm Technologies, Inc. in San Diego seeks a PST Validation Engineer to drive post-silicon validation, emulation, and IP verification across SoCs. The role requires strong C/Python skills, JTAG debugging, and hands-on silicon bring-up experience.

You will collaborate with CAD, RTL, and design teams to optimize validation workflows, build test benches, and ensure high-quality, low-power ASIC delivery.