SoC Infra & NoC Power–Performance Lead

Qualcomm; Santa Clara (CA); On-site; USD 146,000 - 218,000; Full time

Job summary

Qualcomm Technologies, Inc. is seeking a highly experienced engineer for SOC Infrastructure/NoC, Power and Performance Validation in pre-silicon emulation and post-silicon stages for AI accelerator and compute platforms.

You will validate digital design fundamentals, work on on-chip interconnects, and develop system-level test content across HW/SW boundaries to ensure robust silicon validation for advanced product segments.

Qualifications

• Bachelor's/Master's/PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field with 4+ years of ASIC validation experience.
• Experience with interconnects (NoCs, AXI, AHB) and stress testing transactions for coverage.
• Deep knowledge of CPU, DDR concepts, memory hierarchy, power management, and system-level debug tools.

Responsibilities

• Develop thorough performance validation plans and factor Performance-Power trade-offs.
• Analyze SOC bandwidth, QoS, latency, and throughput; create dashboards and KPI tracking.

Skills

C

C++

Python

Assembly

Embedded systems

Education

Bachelor's degree in Science/Engineering

Master's degree in Science/Engineering

PhD in Science/Engineering

Tools

Perfmon

JTAG

Kernel debuggers

Job description

Qualcomm Technologies, Inc. is seeking a highly experienced engineer for SOC Infrastructure/NoC, Power and Performance Validation in pre-silicon emulation and post-silicon stages for AI accelerator and compute platforms.

You will validate digital design fundamentals, work on on-chip interconnects, and develop system-level test content across HW/SW boundaries to ensure robust silicon validation for advanced product segments.