SoC DFT Engineer - ATPG/MBIST & Silicon Debug

Apple, Inc.; Cupertino (CA); On-site; USD 140,000 - 210,000; Full time

Job summary

Apple, Inc. in Cupertino seeks a DFT engineer to design and implement complete DFT solutions for next-generation SoCs. You will develop architecture, run verification, and collaborate with DV teams to ensure robust test coverage across silicon.

The role emphasizes cutting-edge DFT techniques, ATPG, MBIST, JTAG, and industry standards, with a hands-on approach to debugging, scripting, and performance optimization. This is a high-visibility opportunity impacting devices used by millions.

Qualifications

• BS degree and 0+ years of relevant industry experience.
• Experience with ATPG, MBIST, and JTAG.
• Knowledge of Verilog or VHDL and simulators.
• Understanding of design verification methodologies for DFT implementations.

Responsibilities

• Develop and implement DFT architecture for designs.
• Build DFT infrastructure and run DV verification for DFT implementations.
• Generate and analyze test vectors; improve coverage.
• Collaborate with designers on STA, physical, power, and logical issues.
• Work with test engineers to bring up vectors on silicon and debug issues.

Skills

DFT architecture

DFT infrastructure

Verilog/VHDL

Simulation tools

Scripting

DV methodologies

ATPG/MBIST/JTAG

Education

Bachelor's degree (EE) or equivalent

Job description

Apple, Inc. in Cupertino seeks a DFT engineer to design and implement complete DFT solutions for next-generation SoCs. You will develop architecture, run verification, and collaborate with DV teams to ensure robust test coverage across silicon.

The role emphasizes cutting-edge DFT techniques, ATPG, MBIST, JTAG, and industry standards, with a hands-on approach to debugging, scripting, and performance optimization. This is a high-visibility opportunity impacting devices used by millions.