SoC DFT Architect: ATPG, MBIST & Silicon Validation

Apple Inc.; Cupertino (CA); On-site; USD 90,000 - 130,000; Full time

Job summary

Apple Inc. in Cupertino seeks a DFT engineer to contribute to the complete DFT solution for a design project. You will develop and implement DFT architecture, build DFT infrastructure, and collaborate with DV teams to verify implementations and ECOs, ensuring robust test coverage for silicon.

The role requires B.S. plus 0 years of experience, with hands-on skills in Verilog/VHDL, DFT methodologies, and scripting to support ATE data analysis.

Qualifications

• B.S. degree and hands-on experience with HDL languages.
• Knowledge of DFT techniques and test coverage principles.
• Proficiency in scripting to support ATE data analysis.

Responsibilities

• Develop and implement DFT architecture for a design project.
• Build DFT infrastructure and integrate with DV teams for verification.
• Verify implementations and ECOs to ensure robust silicon test coverage.

Skills

Verilog/VHDL

DFT methodologies

Scripting for data analysis

Education

Bachelor's degree

Job description

Apple Inc. in Cupertino seeks a DFT engineer to contribute to the complete DFT solution for a design project. You will develop and implement DFT architecture, build DFT infrastructure, and collaborate with DV teams to verify implementations and ECOs, ensuring robust test coverage for silicon.

The role requires B.S. plus 0 years of experience, with hands-on skills in Verilog/VHDL, DFT methodologies, and scripting to support ATE data analysis.