Silicon Verification Engineer (contract)

Microsoft; Mountain View (WY); Remote; USD 80,000 - 100,000; Full time

Job summary

A leading technology company is seeking a Silicon Verification Engineer for a contract role. The engineer will participate in the test-plan generation process, creating and implementing various verification plans. This remote position requires a Bachelor's degree and relevant experience in silicon verification.

Qualifications

• 5-7 years of relevant experience required.
• Experience in pre and post silicon verification test flow.
• Proficient in using Verilog and VMM/OVM/UVM.

Responsibilities

• Define, document, and implement a UVM verification environment.
• Write test plans and implement them by developing tests.
• Run tests on RTL and Gate Level Netlists, debug failures.

Skills

Verilog

VMM/OVM/UVM

Effective communication

Collaboration

Teamwork

Education

Bachelor’s degree in Electrical Engineering

Bachelor’s degree in Computer Engineering

Bachelor’s degree in Computer Science

Job description

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Silicon Verification Engineer (Contract)

Please note that this is a contract role providing services to Microsoft through external staffing partners of Allegis Global Solutions. If you are selected for this role, you will be employed by AGS and will not be an employee of Microsoft.

Summary

The main function of Silicon Verification Engineer is to be a part of the test-plan generation process, creating, testing, and implementing various verification plans.

Silicon Verification Engineer (Contract)

Please note that this is a contract role providing services to Microsoft through external staffing partners of Allegis Global Solutions. If you are selected for this role, you will be employed by AGS and will not be an employee of Microsoft.

Summary

The main function of Silicon Verification Engineer is to be a part of the test-plan generation process, creating, testing, and implementing various verification plans.

Job Responsibilities

• Define, document, and implement a UVM verification environment including agents and scoreboards.
• Write test plans and implement them by developing tests, test generators, test benches, checkers, coverage, and other verification collateral.
• Run tests on RTL and Gate Level Netlists, debug failures to root cause, and recommend fixes.
• Support post-silicon verification activities of the products working with design and product teams.
  
  

Requirements

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related degree required.
• 5-7 years of relevant experience required.
• Proficient in using Verilog and VMM/OVM/UVM.
• Experience in pre and post silicon verification test flow and automated test benches.
• Effective communication, collaboration, and teamwork skills.
  
  

Additional Details

• Location: Remote
• Duration: 3 Months
• Pay Range: $55.50 - 62.50 per hour
• Weekly Schedule: 40 hours
  
  

AGS is an Equal Opportunity/Affirmative Action Employer (M/F/Disability/Veterans). We will consider all applications without regard to race, gender, sexual orientation, gender identity, age, color, religion, national origin, veteran status, disability, genetic information or any other status protected by applicable law.

Seniority level

• Seniority level

  Mid-Senior level

Employment type

• Employment type

  Contract

Job function

• Job function

  Quality Assurance

• Industries

  Software Development

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