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Ayar Labs, the global leader in optical I/O chiplets, seeks motivated interns for the Link Architecture team in San Jose. You will develop mixed-signal modeling methods bridging system models and device design, mentored by a senior engineer, contributing to the optical I/O revolution.
Applicants should be pursuing a BS, MS, or PhD in engineering or related fields, with strong Python and Verilog-A skills, and an interest in photonics and SERDES blocks.
Ayar Labs, the global leader in optical I/O chiplets, seeks motivated interns for the Link Architecture team in San Jose. You will develop mixed-signal modeling methods bridging system models and device design, mentored by a senior engineer, contributing to the optical I/O revolution.
Applicants should be pursuing a BS, MS, or PhD in engineering or related fields, with strong Python and Verilog-A skills, and an interest in photonics and SERDES blocks.