Signal & Power Integrity Engineer — High-Speed SI Innovator

NVIDIA Corporation

Santa Clara (CA)

On-site

USD 116,000 - 219,000

Full time

14 days+
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Job summary

NVIDIA Corporation is seeking a Signal & Power Integrity Engineer to tackle high-speed interface challenges across NVLink, USB4, PCIe5 and GDDR6. You will model vias, connectors and substrates, develop SI guidelines, and drive accurate SI/PI analyses from lab data and simulations.

You will collaborate with cross-functional teams to optimize packages, PCBs and ASICs, using 3D EM tools (HFSS/Q3D), SIWave, VNA/TDR, and scripting to automate data processing and visualization in JMP or MATLAB.

Qualifications

  • MS and/or PhD in Electrical and Computer Engineering with 2+ years experience.
  • Strong background in applied electromagnetics, waveguides, transmission line theory.
  • Familiarity with SI concepts, design and analysis.
  • Exposure to channel SI time-domain simulations.
  • Experience with 3-D modeling tools such as HFSS/Q3D and SIWave, plus 2D tools.
  • Familiar with VNA, TDR, DSO, ParBERT and tools like ADS, JMP, Matlab, Cadence Allegro.
  • Scripting for data post-processing and automation.

Responsibilities

  • Craft SI solutions to complex system design problems.
  • Model and optimize vias, connectors, sockets, breakouts in 3D EM tools.
  • Run system-level SI simulations for NVLink, USB4, PCIe5, GDDR6, LP5X.
  • Improve SI models using lab data and tool updates.
  • Create/substrate and board layout SI guidelines; post-layout extractions.
  • Automate simulations and data analysis with JMP or MATLAB.
  • Collaborate cross-functionally to optimize package, PCB and ASIC.

Skills

Signal Integrity
Electromagnetics
Waveguides
Transmission Lines
Python
Data post-processing
Lab measurements

Education

MS/PhD in Electrical & Computer Engineering

Tools

ANSYS HFSS
ANSYS Q3D
ANSYS SIWave
ADS
MATLAB
JMP
Cadence Allegro

Job description

NVIDIA Corporation is seeking a Signal & Power Integrity Engineer to tackle high-speed interface challenges across NVLink, USB4, PCIe5 and GDDR6. You will model vias, connectors and substrates, develop SI guidelines, and drive accurate SI/PI analyses from lab data and simulations.

You will collaborate with cross-functional teams to optimize packages, PCBs and ASICs, using 3D EM tools (HFSS/Q3D), SIWave, VNA/TDR, and scripting to automate data processing and visualization in JMP or MATLAB.

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