Senior Signal and Power Integrity Engineer - Hardware

NVIDIA Gruppe; Santa Clara (CA); Hybrid; USD 136,000 - 218,500; Full time

Job summary

NVIDIA Gruppe is seeking a Signal Integrity Engineer in Santa Clara, California, responsible for crafting innovative solutions for complex design problems. The role involves working on high-speed NVlinks and optimizing Power Delivery Networks while utilizing advanced simulations.

The ideal candidate will have a BS/MS in Electrical Engineering and at least 3 years of industry experience with strong knowledge in SI/PI standards. NVIDIA offers a hybrid work model and competitive salary ranges based on experience.

Qualifications

• 3+ years of industry experience.
• Experience with PCI Express, USB, SATA, HDMI, HBM, DDR5, GDDR6, LPDDR5X.
• Familiarity with data automation and analysis tools.

Responsibilities

• Craft creative Signal Integrity solutions.
• Conduct system-level signal integrity simulations.
• Optimize Power Delivery Network across packages and PCBs.

Skills

Signal Integrity solutions

High-speed NVlinks

Power Delivery Network design

3D modeling tools

MATLAB

SI/PI standards

Education

BS/MS in Electrical Engineering

Tools

ANSYS HFSS/Q3D

ANSYS SIWAVE

VNA

oscilloscope

Job description

Responsibilities

• Work on crafting creative Signal Integrity solutions to complex system design problems
• System‑level signal integrity simulations of high‑speed NVlinks 200Gbs+, USB‑4, PCIe5, GDDR6, LP5X
• Modeling of vias, connectors, sockets and various system components in 3D EM tools
• Design and optimize Power Delivery Network (PDN) across packages and PCBs
• Constant improvements of SI/PI models through lab measurements
• Simulation automation, data gathering, analysis and visualization using JMP, MATLAB or similar tools
• Opportunity to work in a dynamic cross‑functional role to optimize package, PCB, ASIC, mixed signal circuit

Qualifications

• BS/MS‑Electrical Engineering or equivalent experience
• 3+ years of industry experience
• SI/PI work on one or more signalling standards such as PCI Express, USB, SATA, HDMI, HBM, DDR5, GDDR6, LPDDR5X
• Hands‑on use of 3‑D modelling tools like ANSYS HFSS/Q3D and 2.5‑D with ANSYS SIWAVE or similar
• Experience with PDN evaluation using layout extraction tools for packages and PCBs and spice‑based time‑domain simulations
• Background with a system level timing or loss budget including silicon, package and board impairments
• Familiarity with use of VNA, TDR, DSO, ParBERT and use of applications such as JMP, MATLAB will be a plus

Ways to Stand Out

• Expertise in one or more of the high‑speed interface SI/PI design on any industry standard system platforms
• Experience with lab measurements, debugging, SI lab correlation using oscilloscope, spectrum analyzer, VNA
• Knowledge of circuit design, board/pkg component design, link architecture, timing budget methodologies

#LI‑Hybrid

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD – 218,500 USD for Level3, and 168,000 USD – 264,500 USD for Level4. You will also be eligible for equity and benefits.

NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. We do not discriminate on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.