Server CPU SoC Performance Architect | Bottleneck Analytics

QUALCOMM, Inc.; Santa Clara (CA); On-site; USD 148,000 - 222,000; Full time

Job summary

Qualcomm Technologies, Inc. in Santa Clara is seeking a SoC Performance Architect to lead server CPU workload analysis, performance modeling, competitive projection, and optimization across hardware and software.

This role focuses on end-to-end system performance for complex server workloads, identifying bottlenecks across the compute stack, and driving actionable improvements. The ideal candidate combines deep architectural expertise with analytical rigor and hands-on performance debugging

Qualifications

• PhD or MS/BS in a relevant field with systems engineering experience.
• Deep understanding of CPU microarchitecture and OS/ compiler effects on perf.
• Hands-on with performance analysis and profiling tools; Linux workloads.

Responsibilities

• Define performance methodologies, metrics, and KPI frameworks.
• Conduct hardware/software sensitivity studies and bottleneck analysis.
• Use profiling tools to capture hotspots, CPI, memory behavior, and stalls.
• Build analytical models for workload behavior and scaling.
• Deliver performance projections for internal and external products.

Skills

CPU microarchitecture

SoC architecture

OS & compiler behavior

Performance profiling tools

Linux workloads

Scripting & data analysis

Education

PhD in Electrical Engineering / Computer Science

Master's degree in Electrical Engineering / CS

Bachelor's degree in Electrical Engineering / CS

Tools

PMU profiling tools

Job description

Qualcomm Technologies, Inc. in Santa Clara is seeking a SoC Performance Architect to lead server CPU workload analysis, performance modeling, competitive projection, and optimization across hardware and software.

This role focuses on end-to-end system performance for complex server workloads, identifying bottlenecks across the compute stack, and driving actionable improvements. The ideal candidate combines deep architectural expertise with analytical rigor and hands-on performance debugging