SerDes Characterization & Post-Silicon Validation Engineer

K2 Space; Seattle (WA); Híbrido; USD 170 000 - 250 000; Tempo integral

Vantagens oferecidas por esta oferta de emprego

Health insurance

Hybrid work model

Equity

Resumo da oferta

K2 Space in Seattle, WA is seeking a hands-on SerDes Characterization & Post-Silicon Validation Engineer to bring up and validate high-speed SerDes interfaces in complex SoCs. You will work with SerDes/IP, mixed-signal, digital, firmware, SI/PI, package, board, and systems teams to move interfaces from first silicon through product integration.

The role involves building our high-speed test and validation capability, developing automated characterization environments, debugging link issues, and

Qualificações

• BS/MS in Electrical Engineering, Computer Engineering, or a related field.
• 5+ years of high-speed SerDes characterization, post-silicon validation, signal integrity, or related experience.
• Strong understanding of NRZ/PAM4 signaling, equalization, CDR, jitter, BER, channel loss, and link budgets.
• Hands-on experience with high-bandwidth equipment: oscilloscopes, BERTs, pattern generators, VNAs, and TDR/TDT.
• Experience with eye diagrams, jitter decomposition, and stressed-eye testing.

Responsabilidades

• Lead post-silicon bring-up and characterization of NRZ and PAM4 SerDes, including 112G-class interfaces.
• Develop and execute electrical characterization plans across lanes, data rates, voltage, temperature, channels, and operating conditions.
• Characterize TX eye quality, jitter, output amplitude, linearity, equalization, RX sensitivity, BER, bathtub curves, CDR performance, and link margin.
• Validate TX/RX equalization including FFE, CTLE, DFE, adaptation, and link-training behavior.
• Perform BER and stress testing across representative and worst-case channels.
• Debug complex link issues spanning SerDes IP, clocks, power, package, PCB/channel, firmware, and digital logic.
• Correlate silicon measurements with SerDes models, simulations, and channel/SI analysis.
• Partner with firmware and digital teams on SerDes configuration, initialization, diagnostics, adaptation, and system-level link bring-up.
• Develop automated characterization environments using Python or similar scripting languages and instrument-control interfaces.
• Support the transition from chip-level SerDes characterization to product integration and system-level validation.
• Contribute to building the high-speed validation lab, equipment, test infrastructure, measurement methodology, and automation from the ground up.

Conhecimentos

High-speed SerDes characterization

Post-silicon validation

Signal integrity

NRZ/PAM4 signaling

Eye diagrams & jitter analysis

Python scripting & automation

Hardware debugging

Team collaboration

Formação académica

BS/MS in Electrical/Computer Engineering or related field

Ferramentas

Oscilloscopes

BERTs

Pattern generators

VNAs

TDR/TDT

Descrição da oferta de emprego

K2 Space in Seattle, WA is seeking a hands-on SerDes Characterization & Post-Silicon Validation Engineer to bring up and validate high-speed SerDes interfaces in complex SoCs. You will work with SerDes/IP, mixed-signal, digital, firmware, SI/PI, package, board, and systems teams to move interfaces from first silicon through product integration.

The role involves building our high-speed test and validation capability, developing automated characterization environments, debugging link issues, and