Senior Yield Optimization Engineer

Samsung Semiconductor

Austin (TX)

On-site

USD 106,000 - 145,000

Full time

2 days ago
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Benefits offered by this job

Medical insurance
Dental insurance
Vision insurance
Life insurance
401(k) matching
Onsite fitness facilities
Paid time off

Job summary

Samsung Austin Semiconductor is seeking a Yield Analysis Engineer to own high-volume product health across tech nodes. You will collaborate with customers and internal teams to monitor line health and trace yield deviations to closure, helping to prevent recurrence.

You will perform daily wafer testing, perform deep dives on bin and zonal shifts, and lead change point analyses for spec releases. This is an on-site, full-time role in Austin, TX with a strong compensation package.

Qualifications

  • BS or MS in Electrical Engineering, Physics, or Chemical Engineering preferred.
  • A minimum of four years of experience as a Device and/or Process Engineer, with knowledge of semiconductor processes, coding, process integration, and device physics, is required.

Responsibilities

  • Yield event closure and defense line: Drive detection source to closure by confirmation of defense line effectiveness.
  • Customer yield management: Prepare customer material set, cross-functional alignment on overall message, and active meeting participation required.
  • Commonality: Daily wafer testing (EDS) map review and yield summary, analytical deep dives (root cause for bin and zonal shifts), dog tool analysis, and integrated issues resulting from multiple change points to identify source of yield degradation or opportunity
  • Change point analyses: YA is responsible for all change point analyses for spec release for both EDS and FT yield. This includes deep dives of change points to provide specific bin / zonal issues with failing change point proposals.

Skills

Yield analysis
Data analysis
Root cause analysis
Coding

Education

BS or MS in Electrical Engineering, Physics, or Chemical Engineering

Tools

EDS

Job description

Samsung Austin Semiconductor is seeking a Yield Analysis Engineer to own high-volume product health across tech nodes. You will collaborate with customers and internal teams to monitor line health and trace yield deviations to closure, helping to prevent recurrence.

You will perform daily wafer testing, perform deep dives on bin and zonal shifts, and lead change point analyses for spec releases. This is an on-site, full-time role in Austin, TX with a strong compensation package.

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