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Silicon Labs in Austin, TX is seeking a Senior Design Verification Engineer to validate digital modem designs for low-power wireless products. You will define verification strategies, build robust test environments, and debug complex issues across PHY/MAC layers throughout the product lifecycle.
You will collaborate with design, architecture, firmware, validation, and system teams, using SystemVerilog/UVM and scripting to achieve high coverage.
Silicon Labs in Austin, TX is seeking a Senior Design Verification Engineer to validate digital modem designs for low-power wireless products. You will define verification strategies, build robust test environments, and debug complex issues across PHY/MAC layers throughout the product lifecycle.
You will collaborate with design, architecture, firmware, validation, and system teams, using SystemVerilog/UVM and scripting to achieve high coverage.