Senior Wafer Test Hardware Engineer - Validation

Google

Fremont (CA)

On-site

USD 159,000 - 231,000

Full time

14 days+

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Benefits offered by this job

Bonus target
Equity
Benefits

Job summary

Google's Raxium division seeks a Senior Wafer Test Hardware Engineer to design test equipment for prototype machinery and scale tests globally. You’ll partner with design engineers to ensure hardware meets Google’s quality standards and reliability in AR/display contexts.

The role emphasizes validating hardware and software paths, coordinating with vendors, and driving cross‑team alignment on test data and procedures. Individual pay includes base, bonus, and equity.

Qualifications

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Physics or equivalent.
  • 5 years in writing semiconductor functional tests, including register-level writes/reads and validation on production data.
  • 2 years with wafer-level probe technologies and failure analysis.
  • Validation of hardware and software paths with component-level verification.

Responsibilities

  • Drive parallel wafer-level test tool specifications with internal teams on pad accommodations and bring-up plans.
  • Define hardware/software validation path and verify vendor components independently from full solution.
  • Assemble test plans including instruction sets for our displays.
  • Define data streams with vendors and manage large die-level datasets and IS infrastructure.
  • Integrate reliability tool with MES and establish SOPs for operations.

Skills

Wafer-level testing
Register-level tests
Hardware validation
Debugging & failure analysis
Python
SQL

Education

Bachelor's degree in Electrical Engineering / Computer Engineering / Physics or equivalent

Tools

JMP
Python
SQL

Job description

Google's Raxium division seeks a Senior Wafer Test Hardware Engineer to design test equipment for prototype machinery and scale tests globally. You’ll partner with design engineers to ensure hardware meets Google’s quality standards and reliability in AR/display contexts.

The role emphasizes validating hardware and software paths, coordinating with vendors, and driving cross‑team alignment on test data and procedures. Individual pay includes base, bonus, and equity.

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