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Google's Raxium division seeks a Senior Wafer Test Hardware Engineer to design test equipment for prototype machinery and scale tests globally. You’ll partner with design engineers to ensure hardware meets Google’s quality standards and reliability in AR/display contexts.
The role emphasizes validating hardware and software paths, coordinating with vendors, and driving cross‑team alignment on test data and procedures. Individual pay includes base, bonus, and equity.
Google's custom-designed machines make up one of the largest and most powerful computing infrastructures in the world. The Hardware Testing Engineering team ensures that this cutting‑edge equipment is reliable. In the R&D lab, you design test equipment for prototypes of our machinery and develop the protocols used to scale these tests for the entire global team. Working closely with design engineers, you give input on designs to improve our hardware until you’re sure it meets Google’s standards of quality and reliability.
Google’s Raxium display group has established a revolutionary semiconductor materials display technology that enables new functionality in display products, bringing to users a closer and more natural linkage between the digital and physical realms in applications such as augmented reality (AR) and light‑field display. With start‑up roots and a state‑of‑the‑art compound semiconductor fab in Silicon Valley, Raxium is seeking to build upon its engineering team with an aim to disrupt next‑generation display markets.
Individual pay is determined by factors including job‑related skills, experience, and relevant education or training.
US: $159000 - $231000 (USD) + 15% bonus target + equity + benefits.
Learn more about benefits at Google.
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