Senior Test Engineer - ATE & SoC/ASIC Characterization

Broadcom

San Jose (CA)

On-site

USD 122,000 - 195,000

Full time

14 days+

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Benefits offered by this job

Discretionary annual bonus
Equity grants
401(K) matching
ESPP
Paid holidays and leave

Job summary

Broadcom is seeking a Test Engineer to join the Semiconductor Test Engineering team. You will develop production, characterization, and qualification test programs to deliver reliable, high-performance SoCs and ASICs, collaborating with design, product, and quality teams to improve test coverage and reduce test time.

Responsibilities include developing Advantest ATE tests, pattern processing, silicon characterization across corners, and driving test efficiency while ensuring quality for

Qualifications

  • BS or MS in Electrical or Computer Engineering required.
  • Experience with digital/high-speed test methods and DFT concepts.
  • Hands-on experience with ATE platforms (Advantest or equivalent).
  • Proficiency in Python or C/C++.

Responsibilities

  • Develop, debug, and maintain ATE test programs for production, characterization, and qualification.
  • Pattern processing and conversion from design environments into tester formats.
  • Characterize and validate silicon across process, voltage, and temperature corners.
  • Collaborate with DFT, design, and product teams to define test requirements and improve coverage.
  • Optimize test flows to reduce test time and cost.
  • Ensure correlation between simulation, bench, and tester environments.
  • Support high-volume manufacturing ramps and address test escapes.

Skills

Analytical skills
Communication
Digital test methods
Pattern processing

Education

Bachelor's degree in Electrical/Computer Engineering
Master's degree in Electrical/Computer Engineering

Tools

Advantest ATE platform

Job description

Broadcom is seeking a Test Engineer to join the Semiconductor Test Engineering team. You will develop production, characterization, and qualification test programs to deliver reliable, high-performance SoCs and ASICs, collaborating with design, product, and quality teams to improve test coverage and reduce test time.

Responsibilities include developing Advantest ATE tests, pattern processing, silicon characterization across corners, and driving test efficiency while ensuring quality for

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