Senior Technology Engineer

Lattice Semiconductor; San Jose (CA); On-site; USD 190,000 - 232,000; Full time

Benefits offered by this job

Equity

Healthcare & retirement

Paid time off

Job summary

Lattice Semiconductor is seeking a Senior Technology Engineer to bridge Lattice engineering with external foundries, enabling successful tape-outs. You will ensure PDK readiness and align internal EDA, design teams, and foundry requirements to deliver high-quality silicon.

In this role, you will drive device test structure definition, support silicon characterization, and help scale processes for managing technology collateral across programs, contributing to fast-paced, results-driven

Qualifications

• BS/MS/PhD in Electrical Engineering or related field.
• 10+ years in semiconductor technology and foundry interfacing roles.
• Deep understanding of advanced process nodes and device physics.
• Proven ability to work with external partners (foundry, EDA, and IP vendors).
• Strong cross-functional collaboration and communication skills.

Responsibilities

• Serve as the primary technical interface to foundries, driving technical alignment, issue resolution, and escalations.
• Partner with EDA teams on procurement, validation, and rollout of PDKs, models, and technology collateral.
• Ensure design and signoff flows align with foundry requirements (DRC/LVS, EM/IR, ESD, SI/PI, reliability, etc.).
• Own device test structure definition and support silicon characterization to validate process assumptions.
• Establish and scale processes for managing technology collateral, documentation, and design methodology consistency across programs.

Skills

Interface with foundries

Cross-functional collaboration

EDA/PDK familiarity

Vendor relationship management

Education

BS/MS/PhD in Electrical Engineering or related field

Tools

CAD/EDA tools

Foundry tools

Job description

Lattice Overview

There is energy here… energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality. Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.

Job Description

We are looking for a Senior Technology Engineer. This person will be responsible for the interface between Lattice engineering and external foundries to enable successful process adoption and on-time tape-out. Ensure PDK readiness, and ensure alignment between internal EDA, design teams, and foundry requirements.

Key Responsibilities

• Serve as the primary technical interface to foundries, driving technical alignment, issue resolution, and escalations
• Partner with EDA teams on procurement, validation, and rollout of PDKs, models, and technology collateral
• Ensure design and signoff flows align with foundry requirements (DRC/LVS, EM/IR, ESD, SI/PI, reliability, etc.)
• Own device test structure definition and support silicon characterization to validate process assumptions
• Establish and scale processes for managing technology collateral, documentation, and design methodology consistency across programs

Qualifications

• BS/MS/PhD in Electrical Engineering or related field
• 10+ years in semiconductor technology and foundry interfacing roles
• Deep understanding of advanced process nodes and device physics
• Proven ability to work with external partners (foundry, EDA, and IP vendors)
• Strong cross-functional collaboration and communication skills

Preferred

• Direct experience with TSMC and Samsung foundry ecosystems
• Strong understanding of CAD/EDA flows (PDK, reliability, ESD, EM/IR, SI/PI, etc.)
• Experience supporting tape-out and silicon validation across multiple nodes

Pay & Benefits

Consistent with Lattice Semiconductor values and applicable law, we provide the following information to promote pay transparency and equity. We have a market-based pay structure which varies by location. Please note that the base pay range is a guideline, and our compensation range reflects the cost of labor in the U.S. geographic market based on the location of the role. Pay within these ranges varies and depends on job-related knowledge, skills, and relevant work experience. For candidates who receive and offer, the starting salary will vary based on various factors including, but not limited to, such qualifications as, skill level, competencies, and work location. The range provided may represent a candidate range and may not reflect the full range for an individual tenured employee.

Base Pay Range

211,000.00

Benefits

• In addition to base pay, this role may be eligible for variable/incentive compensation and/or equity. In addition, this role is eligible for a comprehensive, competitive benefits package which may include healthcare and retirement plans, paid time off, and more!

Additional Information

This position requires a successful background and reference checks and satisfactory proof of your right to work in the United States. Lattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry. Lattice is an international, service-driven developer of innovative low cost, low power programmable design solutions. Our global workforce, some 1,000 strong, shares a total commitment to customer success and an unbending will to win. For more information about how our FPGA, CPLD and programmable power management devices help our customers unlock their innovation, visit www.latticesemi.com. You can also follow us via Twitter, Facebook, or RSS. At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace. Applications are welcome from all qualified candidates. As an E-Verify employer, we use this system to confirm the employment eligibility of all new hires in accordance with federal law. All applicants will be required to complete a Form I-9, Employment Eligibility Verification, upon hire. We do not use E-Verify to pre-screen job candidates and will comply with all E-Verify regulations.