Senior System Power Architect

Lattice Semiconductor; San Jose (CA); On-site; USD 198,000 - 242,000; Full time

Job summary

Lattice Semiconductor is seeking a Senior System Power Architect to lead power analysis and low‑power optimization across FPGA hardware and software. You will define feature specifications and collaborate with hardware, software, marketing, and applications teams.

Responsibilities include developing chip‑level power estimation models, establishing power‑aware RTL methodology, and driving power‑performance analysis to influence roadmaps.

Qualifications

• BS/MS/PhD in EE, CE, CS, or related field.
• Strong knowledge of low-power design techniques.
• Deep expertise in RTL and gate-level power analysis and optimization, plus power-aware synthesis and P&R.
• Hands-on experience with industry power/timing tools (PrimePower, PrimeTime, SpyGlass, Joules, Voltus, PowerArtist) and STA.
• Proficiency in C/C++ and Python.
• Strong written and verbal communication skills.
• Ability to drive cross-functional alignment.
• Knowledge of FPGA architecture and design flows is strongly preferred.

Responsibilities

• Define low-power feature specifications, user flows, algorithms, and align software, marketing, and applications teams
• Drive power-performance analysis to influence hardware and software roadmaps
• Develop chip-level power estimation models covering dynamic, static, clock, memory, and I/O, and correlate models with simulations and silicon
• Establish power-aware RTL methodology
• Develop power and competitive benchmarks
• Lead and mentor junior engineers across distributed teams

Skills

Low-power design

RTL power analysis

Power-aware synthesis

C/C++

Python

Communication skills

Cross-functional alignment

FPGA architecture knowledge

Education

BS/MS/PhD in EE, CE, CS, or related field

Tools

PrimePower

PrimeTime

SpyGlass

Joules

Voltus

PowerArtist

Job description

Lattice OverviewThere is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.

Lattice OverviewThere is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality. Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.

Job Description

Senior System Power Architect

The Senior System Power Architect drives power analysis and low-power optimization across Lattice FPGA hardware and software. The role involves the design of low-power feature specifications, algorithms, and methodology, collaborating with hardware, software, marketing, and applications teams.

Responsibilities

• Define low-power feature specifications, user flows, algorithms, and align software, marketing, and applications teams
• Drive power-performance analysis to influence hardware and software roadmaps
• Develop chip-level power estimation models covering dynamic, static, clock, memory, and I/O, and correlate models with simulations and silicon
• Establish power-aware RTL methodology
• Develop power and competitive benchmarks
• Lead and mentor junior engineers across distributed teams

Qualifications

• BS/MS/PhD in EE, CE, CS, or related field with 8+/6+/3+ years of relevant experience
• Strong knowledge of low-power design techniques
• Deep expertise in RTL and gate-level power analysis and optimization, as well as power‑aware synthesis and P&R
• Hands‑on experience with industry power/timing tools (e.g., PrimePower, PrimeTime, SpyGlass, Joules, Voltus, PowerArtist) with strong knowledge of STA, and power/timing ECO flows
• Proficiency in C/C++ and Python
• Strong written and verbal communication skills
• Ability to drive cross-functional alignment
• Knowledge of FPGA architecture, design flows, and use cases is strongly preferred

Pay & Benefits

Consistent with Lattice Semiconductor values and applicable law, we provide the following information to promote pay transparency and equity. We have a market-based pay structure which varies by location. Please note that the base pay range is a guideline, and our compensation range reflects the cost of labor in the U.S. geographic market based on the location of the role. Pay within these ranges varies and depends on job-related knowledge, skills, and relevant work experience.

For candidates who receive and offer, the starting salary will vary based on various factors including, but not limited to, such qualifications as, skill level, competencies, and work location. The range provided may represent a candidate range and may not reflect the full range for an individual tenured employee.

Base Pay Range

220,000.00

In addition to base pay, this role may be eligible for variable/ incentive compensation and/ or equity. In addition, this role is eligible for a comprehensive, competitive benefits package which may include healthcare and retirement plans, paid time off, and more!

Additional Information

This position requires a successful background and reference checks and satisfactory proof of your right to work in the United States.

Lattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry.

Lattice is an international, service-driven developer of innovative low cost, low power programmable design solutions. Our global workforce, some 1,000 strong, shares a total commitment to customer success and an unbending will to win. For more information about how our FPGA, CPLD and programmable power management devices help our customers unlock their innovation, visit www.latticesemi.com. You can also follow us via Twitter, Facebook, or RSS. At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace. Applications are welcome from all qualified candidates.

As an E-Verify employer, we use this system to confirm the employment eligibility of all new hires in accordance with federal law. All applicants will be required to complete a Form I-9, Employment Eligibility Verification, upon hire. We do not use E-Verify to pre-screen job candidates and will comply with all E-Verify regulations.