Senior System Power & Performance Architect — Equity Eligible

Nvidia Corporation in; Santa Clara (CA); Hybrid; USD 232,000 - 368,000; Full time

Benefits offered by this job

Equity

Benefits

Job summary

NVIDIA Corporation'sSilicon Co-Design Group seeks a Principal System Power Management and Performance Architect to shape system-level power and performance across multiple silicon generations.

You will define roadmaps, own HSIO power management and DVFS, lead boot and low-power flows, and coordinate with ASIC, firmware, and board teams while driving efficiency and reliability in high-performance datacenters.

Qualifications

• BS or MS in EE/CE, or equivalent experience.
• 15+ years of system architecture, development, and validation focused on power and performance-per-watt in datacenter/high-performance platforms.
• Proven history guiding architecture decisions across multiple silicon programs; explain roadmaps and changes.
• Deep knowledge of HSIO power management, DVFS, P-states, boot flows, and low-power architecture.
• Strong fundamentals in low-power design and rack-level performance.

Responsibilities

• Define the multi-generation roadmap for system-level power and performance features.
• Own architecture and integration strategy for HSIO power management, DVFS, P-states, and low-power features.
• Lead system-level boot and IST architecture for multi-IP systems.
• Drive datacenter-scale power management including rack-level telemetry and platform state coordination.
• Identify and redesign system-level processes for boot/reset flows and low-power entry/exit.
• Serve as technical authority across architecture, ASIC, board/platform, and firmware teams.

Skills

System architecture

Power management

DVFS

P-states

Boot flows

Low-power design

Education

BS or MS in EE/CE

Job description

NVIDIA Corporation'sSilicon Co-Design Group seeks a Principal System Power Management and Performance Architect to shape system-level power and performance across multiple silicon generations.

You will define roadmaps, own HSIO power management and DVFS, lead boot and low-power flows, and coordinate with ASIC, firmware, and board teams while driving efficiency and reliability in high-performance datacenters.