Senior System Modeling Engineer - ASIC/SoC & AI Infra

AMD; Santa Clara (CA); Hybrid; USD 170,000 - 210,000; Full time

Job summary

AMD is seeking a Senior Modeling Engineer in Santa Clara, CA, to shape next-generation AI, cloud, and data center infrastructures. You will develop high-level and cycle-accurate models for complex ASIC/SoC platforms, collaborating across architecture, design, verification, and software teams to accelerate development and validation cycles.

The role demands strong C++ and SystemC skills, experience with ASIC/SoC modeling, and a proactive, team-oriented mindset.

Qualifications

• Bachelor's or master's degree in electrical/computer engineering, computer science, or related technical discipline preferred.
• Strong programming and debugging skills with a system-level mindset.
• Experience modeling ASIC/SoC, architecture exploration, or software acceleration.

Responsibilities

• Develop high-level, transaction-level, and cycle-accurate models for ASIC/SoC platforms.
• Create models to support architecture exploration and software development acceleration.
• Collaborate with architecture, design, verification, and software teams to build reusable validation environments.
• Analyze system behavior to identify optimization opportunities and performance bottlenecks.
• Debug architectural, functional, and performance issues across hardware/software stacks.
• Contribute to systemic modeling initiatives using SystemC and related frameworks.
• Develop automation and scripting to streamline modeling and validation workflows.
• Inform architecture decisions through modeling and performance analysis.

Skills

C++ programming

SystemC modeling

ASIC/SoC modeling

Python scripting

Performance analysis

Education

Bachelor's or Master's in EE/CE/CS

Tools

SystemC

Python

ARM Fast Models

OMNeT

Job description

AMD is seeking a Senior Modeling Engineer in Santa Clara, CA, to shape next-generation AI, cloud, and data center infrastructures. You will develop high-level and cycle-accurate models for complex ASIC/SoC platforms, collaborating across architecture, design, verification, and software teams to accelerate development and validation cycles.

The role demands strong C++ and SystemC skills, experience with ASIC/SoC modeling, and a proactive, team-oriented mindset.