Senior Substrate Layout Engineer

Mercury Systems; Phoenix, Northern (AZ, KY); Hybrid; USD 75,000 - 150,000; Full time

Benefits offered by this job

Bonus opportunities

Health insurance

Life insurance

Disability insurance

Holidays and time off

Employee stock purchase plan

Tuition reimbursement

Professional development platforms

Job summary

Mercury Systems is seeking a Senior Substrate Layout Engineer to lead HDI PCB and substrate layout for rugged microelectronic solutions used in aerospace and defense. You will guide high‑density layout, ensure DFM alignment, and coordinate with suppliers across multiple die, focusing on flip‑chip and interposer strategies.

You will work within a Cadence‑driven workflow, apply JEDEC/IPC specs, and contribute to complex system‑level decisions while supporting cross‑functional teams and security

Qualifications

• Typically requires a minimum of 4+ years of experience as a high‑density package layout designer.
• Proficiency with Cadence APD+ physical and electrical constraint editors and experience with HDI stack‑ups, blind/buried micro‑vias, and fine‑pitch routing.

Responsibilities

• Provide technical leadership focused on high‑speed interfaces and high‑density substrate layout techniques, guiding engineering teams to deliver high‑quality microelectronic solutions
• Drive the design, layout, and analysis of complex electrical and mechanical systems, including high‑density interposers, substrates, and PCB layouts supporting digital, analog, power, and RF signals across multiple die (primarily flip‑chip)
• Coordinate development processes to ensure alignment with supplier DFМ rules and capabilities
• Create fabrication drawings that accurately represent design intent and collaborate with fabrication suppliers to ensure successful technical transfer
• Review artwork, drawings, and design artifacts throughout the layout cycle and during final design reviews for fabrication and assembly
• Support multidisciplinary investigations, feasibility studies, and design trades in collaboration with cross‑functional engineering teams
• Apply systems‑thinking to understand and communicate how design decisions impact the broader system
• Assist the team beyond specific technical discipline as needed to meet program and organizational goals
• This position requires you to have or obtain a government security clearance. Security clearances may only be granted to U.S. citizens.

Skills

HDI layout design

Cadence APD+

Constraint Manager

2.5D devices/interposers

flip‑chip packaging

high‑speed interconnects

CAM tools (CAM350, Blueprint)

JEDEC/IPC specs

Tools

Cadence APD+ toolset

Cadence Constraint Manager

CAM350

Blueprint

Sigrity/Clarity (Ansys/Cadence)

Job description

Mercury Systems is seeking the best and brightest engineering talent to help us deliver cutting‑edge technology for mission‑critical aerospace and defense applications, advancing innovation where it matters most.

In this role, our team is looking for a Senior Substrate Layout Engineer who will lead complex HDI PCB and substrate layout efforts for advanced microelectronic solutions used in aerospace, defense, and space systems. You will contribute directly to the design, layout, and optimization of rugged, high‑density microelectronics that operate in the harshest environments with exceptional reliability. This role serves as a technical authority within Mercury’s Microsystems business, driving layout excellence, influencing engineering standards, and shaping the technical direction of multiple high‑impact programs. Working within Mercury’s Integrator Mindset, you will collaborate across sites and disciplines to deliver breakthrough microelectronics that strengthen national security and support onshore trusted manufacturing.

Job Responsibilities:

Provide technical leadership focused on high‑speed interfaces and high‑density substrate layout techniques, guiding engineering teams to deliver high‑quality microelectronic solutions

Drive the design, layout, and analysis of complex electrical and mechanical systems, including high‑density interposers, substrates, and PCB layouts supporting digital, analog, power, and RF signals across multiple die (primarily flip‑chip)

Coordinate development processes to ensure alignment with supplier Design for Manufacturing (DFM) rules and capabilities

Create fabrication drawings that accurately represent design intent and collaborate with fabrication suppliers to ensure successful technical transfer

Review artwork, drawings, and design artifacts throughout the layout cycle and during final design reviews for fabrication and assembly

Support multidisciplinary investigations, feasibility studies, and design trades in collaboration with cross‑functional engineering teams

Apply systems‑thinking to understand and communicate how design decisions impact the broader system

Assist the team beyond specific technical discipline as needed to meet program and organizational goals

Required Qualifications:

• Typically requires a minimum of 4+ years of experience as a high‑density package layout designer using industry‑standard tools

Proficiency with Cadence APD+ physical and electrical constraint editors and experience with HDI stack‑ups, blind/buried micro‑vias, and fine‑pitch routing (e.g., 15µm/15µm to 2µm/2µm or below)

• Knowledge of Cadence Constraint Manager
• Experience with 2.5D devices, interposers, substrates, flip‑chip, and high‑end package design

Understanding of layout techniques in digital, analog, and/or RF designs

High‑end package design experience, especially in advanced substrate or interposer designs.

Ability to work within a Cadence schematic/netlist‑driven layout workflow; experience with CAM tools for manufacturing data validation (CAM350 and Blueprint preferred)

Understanding of layout techniques for digital, analog, and RF designs; knowledge of JEDEC and IPC design, fabrication, and assembly specifications

Knowledge of electronic packaging techniques and collaboration with mechanical engineering teams to support 3D modeling for fit checks and thermal analyses

Working knowledge of JEDEC and IPC design, fabrication, and assembly specifications

Experience creating assembly documentation and fabrication deliverables per company and industry standards

“This position requires you to have or obtain a government security clearance. Security clearances may only be granted to U.S. citizens.”

Preferred Qualifications:

• Understanding of signal‑integrity fundamentals including impedance, crosstalk, and power‑integrity considerations
• Knowledge of substrate materials, stack‑up creation, and packaging architectures
• Experience with Through‑Silicon Via (TSV) or interposer‑based designs or die stacking
• Familiarity with Ansys or Cadence simulation tools such as Sigrity and Clarity
• Ability to support electrical engineers with netlisting and component‑selection tasks
• Experience routing high‑frequency SERDES or RF interfaces
• Experience with scripting or automation for layout workflows

Fulltime Equivalent Job Grade Salary Range for this position

• "$75,000.00 - $150,000.00 annual salary for in-office or hybrid employees in FL, GA, IN, AZ, AL, MD or TX, and all remote employees"
• "$84,000.00 - $168,000.00 annual salary for in-office or hybrid employees in VA, CA, NH or MA"
• "$88,500.00 - $177,000.00 annual salary for in-office or hybrid employees in NJ"

Additional Information

Mercury considers a variety of factors to determine individual base salary offers to candidates, including:

the role and related responsibilities;

education, training, skills and certifications;

internal equity with others employed by Mercury in similar roles;

geographic location; and

alignment with market data.

In addition to base salary, Mercury provides a variety of benefits for team members including:

bonus opportunities (or special incentives for sales positions);

health, life and disability insurance;

company-paid holidays and time off;

discounted employee stock purchase plan;

tuition reimbursement; and

access to professional development and personal wellness platforms including LinkedIn Learning, Headspace, Aaptiv and Virgin Pulse.

Team members at the Director or Vice President level are also eligible to receive annual stock-based awards.

Mercury offers a 9/80 alternative work schedule that provides employees more opportunity for work/ life balance (available based off location)

Why Mercury?

Why should you join Mercury Systems?

Mercury Systems is a technology company that makes the world a safer, more secure place. We push processing power to the tactical edge, making the latest commercial technologies profoundly more accessible for today's most challenging aerospace and defense missions. From silicon to system scale, Mercury enables customers to accelerate innovation and turn data into decision superiority. Headquartered in Andover, Massachusetts, Mercury employs more than 2,300 people in 24 locations worldwide. To learn more, visit mrcy.com

Our Culture

We are committed to making Mercury a great place to work, no matter where our employees are located. We offer a casual and enjoyable atmosphere that allows employees to learn and grow. We help and care for one another and work as one to achieve results for us and for our customers. We value communication and transparency, and strive to foster two‑way dialogue at all levels of the organization. We are committed to lifelong learning, offering comprehensive skills training and tuition reimbursement. Whether you're just starting out on your career journey or you are an experienced professional, it's important to us that you feel recognized and rewarded for your contributions.

Mercury Systems is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, age, sex (including pregnancy), sexual orientation, gender identity, national origin, genetic information, creed, citizenship, disability, protected veteran or marital status.

As an equal opportunity employer, Mercury Systems is committed to a diverse workforce. In order to ensure reasonable accommodation for individuals protected by Section 503 of the Rehabilitation Act of 1973, the Vietnam Veterans' Readjustment Act of 1974, and Title I of the Americans with Disabilities Act of 1990, applicants that require accommodation in the job application process may contact the number below for assistance.