Senior Staff Digital Design Engineer

OSI USA Danvers; Plano (TX); On-site; USD 120,000 - 180,000; Full time

Job summary

ams OSRAM in Plano, TX, seeks a Digital IC Design Lead with 5+ years in RTL, verification, and silicon debug. You will translate requirements into RTL architectures and drive sign-off across Lint, CDC/RDC, Formal Verification and timing validation.

You will collaborate with system, analog, verification and physical teams to define specs, develop IPs, and lead silicon bring-up and debug for first-pass success. Excellent communication and leadership are essential.

Qualifications

• B.Tech/M.Tech in Electronics, Electrical Engineering, VLSI or related field.
• 5+ years in Digital IC Design with RTL, verification, synthesis, and silicon debug.
• Strong Verilog/SystemVerilog skills and digital design methodologies.
• Experience with complex state machines and mixed-signal interfaces.

Responsibilities

• Lead architecture, design, integration and silicon realization of complex digital/subsystems.
• Translate requirements into RTL architectures and Verilog/SystemVerilog implementations.
• Drive signoff via Lint, CDC/RDC, Formal Verification, LEC, and timing validation.
• Collaborate with system, analog, verification and physical design teams.
• Develop digital control and interface logic for ADCs, power management, sensors, IPs.
• Lead silicon bring-up, debug, and design-to-silicon correlation for first-pass success.
• Serve as customer-facing technical lead, presenting architecture and design reviews.
• Prepare technical proposals, effort estimates, PPA projections, specs, docs.
• Provide technical leadership and drive design methodology improvements.

Skills

Technical leadership

Communication skills

Self-motivated & agile

Mentor & team player

Cross-functional collaboration

Fluent English

Education

B.Tech/M.Tech in Electronics / Electrical Engineering / VLSI

Tools

UVM verification

IC/I3C/SPI/UART interfaces

Xcelium / Genus / SpyGlass / OneSpin

Innovus / PrimeTime & Tempus / DFT

Arm AMBA protocols (AXI/AHB/APB)

Cadence Virtuoso

Job description

Your tasks

• Lead the architecture, design, integration, and silicon realization of complex digital and mixed-signal subsystems from specification through production


• Translate customer and system requirements into optimized RTL architectures and high-quality Verilog/SystemVerilog implementations meeting PPA targets


• Drive design quality and signoff through Lint, CDC/RDC, Formal Verification, LEC, synthesis, and timing validation


• Collaborate with system, analog, verification, and physical design teams to define specifications and ensure successful product execution


• Develop digital control and interface logic for ADCs, analog front-end, power management, sensors, and other mixed-signal IPs


• Lead silicon bring-up, debug, root-cause analysis, and design-to-silicon correlation to achieve first-pass silicon success


• Serve as a key customer-facing technical lead, presenting architecture, design reviews, and quality metrics, while driving resolution of technical issues


• Prepare technical proposals, effort estimates, PPA projections, specifications, and design documentation


• Provide technical leadership and drive continuous improvement in design methodologies and best practices

Who we are looking for

Required Education and Experience

• B.Tech/M.Tech in Electronics, Electrical Engineering, VLSI, or a related discipline


• 5+ years of experience in Digital IC Design with strong expertise in RTL design, verification, synthesis, and silicon debug


• Strong proficiency in Verilog/SystemVerilog and digital design methodologies


• Proven experience in designing complex state machines, control logic, data-processing modules, and mixed-signal interfaces


• Hands-on experience with UVM-based verification and industry-standard serial interfaces such as IC, I3C, SPI, and UART


• Expertise in low-power design techniques, PPA optimization, CDC/RDC analysis, Lint, Formal Verification, and LEC flows


• Strong understanding of STA, synthesis, and implementation-aware design methodologies


• Proficiency in Python, Tcl, Perl, or Shell scripting


• Experience with Xcelium, Genus, SpyGlass, OneSpin/JasperGold, and familiarity with Innovus, PrimeTime/Tempus, and DFT flows


• Experience with ARM-based SoCs and AMBA protocols (AXI/AHB/APB) is a strong advantage


• Familiarity with Cadence Virtuoso and mixed-signal design environments is a plus

Required Personal Skills

• Strong technical leadership, analytical, and problem-solving abilities


• Excellent communication, presentation, and customer engagement skills


• Self-motivated, agile, results-oriented, and capable of driving projects independently


• Effective mentor and collaborative team player


• Ability to influence cross-functional teams and deliver in fast-paced environments


• Passion for sensor, imaging, and mixed-signal semiconductor technologies


• Fluent in written and spoken English

ams OSRAM is an Equal Employment Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, national origin, age, disability, gender identity, or veteran status. If you are an individual with a disability and require a reasonable accommodation to complete any part of the application process, please contact the local Recruiter, Hiring Manager or HR Manager in the location in which you are applying for.