Senior SRAM/ROM Memory Design Engineer — Austin

NXP Semiconductors

Austin (TX)

On-site

USD 170,000 - 230,000

Full time

9 days ago

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Job summary

NXP Semiconductors in Austin, Texas is seeking an experienced memory circuit design engineer for SRAM/ROM memory compiler work. The role focuses on implementing memory circuits to meet performance, power, and area targets and coordinating with layout/CAD teams to integrate designs into characterization and regression flows.

The ideal candidate has 8+ years in SRAM memory circuit design, strong Cadence Virtuoso skills, and proficiency in scripting languages such as Perl, Tcl, or Python.

Qualifications

  • Bachelor's degree in Electrical/Computer Engineering or related field; Master's preferred.
  • 8+ years in SRAM memory circuit design, with CMOs at 5nm+.
  • Strong familiarity with Cadence Virtuoso and industry-standard EDA tools.
  • Knowledge of automotive memory design rules is a plus.
  • Proficiency in scripting with Perl, Tcl or Python.

Responsibilities

  • Design CMOS memory circuits to meet performance, power and area targets for memory compiler.
  • Generate and evaluate simulation characterization metrics and test benches.
  • Collaborate with layout teams on compiler leaf cell implementations and enhancements.
  • Coordinate with CAD teams to integrate designs into flows and validation.
  • Leverage GenAI/LLM tools to improve design methodologies.

Skills

Memory design
CMOS 5nm+
Scripting (Perl, Python, Tcl)
Analytical problem solving

Education

Bachelor's degree in Electrical/Computer Engineering
Master's degree preferred

Tools

Cadence Virtuoso
Other EDA tools

Job description

NXP Semiconductors in Austin, Texas is seeking an experienced memory circuit design engineer for SRAM/ROM memory compiler work. The role focuses on implementing memory circuits to meet performance, power, and area targets and coordinating with layout/CAD teams to integrate designs into characterization and regression flows.

The ideal candidate has 8+ years in SRAM memory circuit design, strong Cadence Virtuoso skills, and proficiency in scripting languages such as Perl, Tcl, or Python.

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