A Series-D semiconductor startup in Austin is looking for a Senior Verification Engineer. This role focuses on building and verifying next-generation optical communication systems. The ideal candidate will have over 5 years of experience, including expertise in VLSI verification methodologies. You will develop advanced verification environments and collaborate closely with design teams to ensure quality. Competitive salary of USD 160,000 – 180,000 per year with H1-B sponsorship available.
Qualifications
Minimum 5+ years of total experience, including 3+ years in verification.
Hands-on experience with VLSI verification methodologies.
Experience with data path or protocols, preferably Ethernet.
Responsibilities
Plan and execute verification of complex digital design blocks.
Build advanced verification environments using SystemVerilog and UVM.
Participate in architectural discussions related to DSP systems.
Skills
VLSI verification flow knowledge
SystemVerilog + UVM expertise
Strong debugging skills
Problem-solving abilities
Communication skills
Job description
A Series-D semiconductor startup in Austin is looking for a Senior Verification Engineer. This role focuses on building and verifying next-generation optical communication systems. The ideal candidate will have over 5 years of experience, including expertise in VLSI verification methodologies. You will develop advanced verification environments and collaborate closely with design teams to ensure quality. Competitive salary of USD 160,000 – 180,000 per year with H1-B sponsorship available.