Senior SoC Verification Architect

Amazon Inc.

Cupertino (CA)

On-site

USD 277,000 - 350,000

Full time

5 days ago
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Job summary

Amazon Web Services (AWS) seeks a Principal Design Verification Engineer for a new team verifying high-speed I/O and scale‑up components across SoCs. You will own verification environments from IP to system level, collaborating with design, architecture, and software to ensure broad coverage and robust solutions.

You will lead strategy across FV, emulation, and test generation, mentor teammates, and drive cross‑module correctness with a focus on system-wide implications.

Qualifications

  • Bachelor's degree in Electrical Engineering or a related field.
  • 8+ years of design verification experience using constrained-random simulation techniques (such as UVM).
  • 8+ years of testbench development experience including stimulus, checkers, assertions and coverage.

Responsibilities

  • Architect and implement end-to-end verification strategies addressing system-wide implications and cross-module interactions
  • Drive unified verification plans across multiple environments, tools and methodologies
  • Provide technical leadership for verification efforts, guiding architectural decisions and methodology choices
  • Own the technical direction and drive resolution of complex verification challenges at sub-system and chip-level, providing hands‑on technical guidance and effective solutions
  • Guide and mentor team members on best practices, methodology improvements, and technical problem-solving

Skills

Design verification
Testbench development
Constrained-random (UVM)
SystemVerilog
Leadership
Python
C/C++
OO design
FV/Emulation
AMBA protocols
PCIe/CXL/UCIe

Education

Bachelor's degree in Electrical Engineering or related field

Tools

Python
Perl
C/C++
Java or C#

Job description

Amazon Web Services (AWS) seeks a Principal Design Verification Engineer for a new team verifying high-speed I/O and scale‑up components across SoCs. You will own verification environments from IP to system level, collaborating with design, architecture, and software to ensure broad coverage and robust solutions.

You will lead strategy across FV, emulation, and test generation, mentor teammates, and drive cross‑module correctness with a focus on system-wide implications.

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