Senior SOC Physical Design Engineer

Qualcomm; San Diego (CA); On-site; USD 131,000 - 173,000; Full time

Job summary

Qualcomm Technologies, Inc. is seeking a professional to independently plan and execute physical design flows for high-speed DDR, graphics, and SOC blocks with a focus on power efficiency and performance.

The role covers Floor Planning, Clock Tree Synthesis, Place and Route, PDN, timing analysis, and verification checks (LVS/DRC). You will support tapeout signoff and participate in design reviews and cross-functional meetings.

Qualifications

• Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.

Responsibilities

• Plan and perform physical design flows (DDR, graphics, SoC) focusing on power utilization and optimization.
• Perform Floor Planning, Clock Tree Synthesis, Place and Route, PDN, Timing analysis and closure.
• Conduct LVS, DRC, DFMr, and yield checks at chip and block levels.
• Support signoff closure for tapeout and participate in design reviews and project meetings.

Skills

Power optimization

SoC design experience

Education

Master's degree in Electrical Engineering

Tools

Floor Planning

Clock Tree Synthesis

Place and Route

PDN

Timing analysis

Job description

Company:

Qualcomm Technologies, Inc.

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

This individual independently plans, performs the moderately-defined responsibility for the Physical Design Flow of high-speed DDR, graphics, physical verification flows, micro-architecture, SOC algorithm design and modeling, and methodology, focusing on target power utilization and optimization for system-on-chip (SoC) products and how these features impact power and performance. Responsibilities include: Floor Planning, Clock Tree Synthesis, Place and Route, PDN, Timing analysis and closure. Performs various physical verification checks (such as LVS, DRC, design-for-manufacturing & design-for-yield) at the chip and block levels. Provides schedules and support cross-functional engineering effort to drive to signoff closure for tapeout. Acts as a strong contributor at design reviews and project meetings.

Qualifications:

Will accept a Master's Degree (or foreign academic equivalent) in Electrical Engineering, Computer Engineering, Computer Science or related degree field.

Pay Range:

$131,175.00 - $173,400.00/year

Applicants:

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [e-mail] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

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EEO Employer:

Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

Company Policies:

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

Contact:

If you would like more information about this role, please contact Qualcomm Careers.