Senior SoC Engineer

ALTEN

San Francisco (CA)

On-site

USD 140,000 - 190,000

Full time

43 hours ago
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Job summary

ALTEN in San Francisco seeks a Senior SoC Engineer with strong ARM CPU subsystem experience to bridge Hardware and Firmware, driving firmware-driven validation, system bring-up and complex HW–FW debug.

You will partner with hardware and software teams on cross-layer debugging, pre-silicon validation and post-silicon bring-up, focusing on ARM Cortex-A/R subsystems and AMBA protocols.

Qualifications

  • Strong ARM CPU subsystem experience with Cortex-A/R.
  • Proficient in AMBA protocols AXI/ACE/CHI.
  • Firmware-driven validation, bring-up and debugging boot flows.
  • Ability to read C/C++ and correlate FW execution with HW behavior.

Responsibilities

  • Act as the primary interface (POC) for the Firmware team.
  • Debug firmware-driven issues, including boot failures, system hangs, and performance bottlenecks.
  • Perform cross-layer debug (RTL/SoC/Firmware) and analyze logs, traces, and waveforms.
  • Support pre-silicon validation and post-silicon bring-up.

Skills

ARM CPU subsystems
Cache coherency
GIC
Firmware debugging
Boot flow analysis

Tools

Synopsys VCS
Cadence Xcelium
Verdi
SimVision

Job description

Role Summary

We are seeking a Senior SoC Engineer with strong ARM CPU subsystem experience to serve as the technical bridge between Hardware and Firmware teams. This role focuses on firmware-driven validation, system bring-up, and complex HW–FW debug.

Core Responsibilities
  • Act as the primary interface (POC) for the Firmware team.
  • Debug firmware-driven issues, including boot failures, system hangs, and performance bottlenecks.
  • Perform cross-layer debug (RTL/SoC/Firmware) and analyze logs, traces, and waveforms.
  • Support pre-silicon validation and post-silicon bring-up.
Required Qualifications
  • Architecture & SoC: Strong experience with ARM CPU subsystems (Cortex-A/R), cache hierarchy, coherency, MMU, and GIC.
  • Protocols: Proficiency in AMBA protocols (AXI, ACE, CHI) and memory ordering.
  • Firmware Debug: Hands-on experience in firmware-driven validation, bring-up, and debugging boot flows. Ability to read C/C++ and correlate FW execution with HW behavior.
  • Tools: Experience with Synopsys VCS, Cadence Xcelium, Verdi, or SimVision.
Preferred Qualifications
  • Experience with emulation (ZeBu/Palladium) or FPGA platforms.
  • Exposure to ARM CoreSight, trace-based debug, and Linux/RTOS environments.
  • Experience in multi-core, AI, or high-performance SoCs.
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