Senior Silicon Reliability Engineer - Wearout (Equity)

NVIDIA Gruppe; Santa Clara (CA); On-site; USD 168,000 - 322,000; Full time

Job summary

NVIDIA in California seeks a Silicon Reliability Engineer to drive cutting-edge reliability methods for high-performance GPUs. You will collaborate with wafer foundries and internal teams to define reliability requirements for new technology nodes and guide wearout mitigation across product lifecycles.

Ideal candidates hold an MS/PhD in EE or Physics, 8+ years in semiconductor reliability, and are proficient with JMP for data analysis. Equity and competitive compensation reflect seniority.

Qualifications

• Deep understanding of semiconductor process technologies and reliability physics.
• Familiar with wearout failure mechanisms (TDDB, BTI, HCI, EM, SM) and tests.
• Proficient in reliability statistics and failure rate calculations.
• Knowledge of defect screening and failure analysis.
• Understanding of reliability degradation in logic and memory circuits.
• Hands-on with reliability data analysis using JMP.
• Excellent written and verbal communication and presentation skills.
• PhD or MS in Electrical Engineering, Physics, or related field.
• 8+ years of semiconductor reliability experience.

Responsibilities

• Work with foundries and teams to set process reliability requirements for new nodes.
• Drive foundries for test-vehicle qualifications and reliability improvements before tape-out.
• Perform wearout reliability assessments and advise on Design for Reliability.
• Provide Vmax and aging guardband guidance and develop reliability methodologies.
• Collaborate with foundries to plan stress tests and build reliability models.
• Interact with foundries on excursion materials and assess reliability risk.

Skills

Semiconductor reliability

Wearout models

Reliability statistics

Failure rate calculations

Data analysis

Communication skills

Collaboration with foundries

Presentation skills

Education

MS in Electrical Engineering

MS in Physics

PhD in Electrical Engineering

Tools

JMP

Job description

NVIDIA in California seeks a Silicon Reliability Engineer to drive cutting-edge reliability methods for high-performance GPUs. You will collaborate with wafer foundries and internal teams to define reliability requirements for new technology nodes and guide wearout mitigation across product lifecycles.

Ideal candidates hold an MS/PhD in EE or Physics, 8+ years in semiconductor reliability, and are proficient with JMP for data analysis. Equity and competitive compensation reflect seniority.