Senior Silicon Reliability Engineer

Nvidia Corporation; Santa Clara (CA); On-site; USD 168,000 - 322,000; Full time

Job summary

NVIDIA in California seeks a Silicon Reliability Engineer to drive cutting-edge reliability methods for high-performance GPUs. You will collaborate with wafer foundries and internal teams to define reliability requirements for new technology nodes and guide wearout mitigation across product lifecycles.

Ideal candidates hold an MS/PhD in EE or Physics, 8+ years in semiconductor reliability, and are proficient with JMP for data analysis. Equity and competitive compensation reflect seniority.

Qualifications

• Deep understanding of semiconductor process technologies and reliability physics.
• Familiar with wearout failure mechanisms (TDDB, BTI, HCI, EM, SM) and tests.
• Proficient in reliability statistics and failure rate calculations.
• Knowledge of defect screening and failure analysis.
• Understanding of reliability degradation in logic and memory circuits.
• Hands-on with reliability data analysis using JMP.
• Excellent written and verbal communication and presentation skills.
• PhD or MS in Electrical Engineering, Physics, or related field.
• 8+ years of semiconductor reliability experience.

Responsibilities

• Work with foundries and teams to set process reliability requirements for new nodes.
• Drive foundries for test-vehicle qualifications and reliability improvements before tape-out.
• Perform wearout reliability assessments and advise on Design for Reliability.
• Provide Vmax and aging guardband guidance and develop reliability methodologies.
• Collaborate with foundries to plan stress tests and build reliability models.
• Interact with foundries on excursion materials and assess reliability risk.

Skills

Semiconductor reliability

Wearout models

Reliability statistics

Failure rate calculations

Data analysis

Communication skills

Collaboration with foundries

Presentation skills

Education

MS in Electrical Engineering

MS in Physics

PhD in Electrical Engineering

Tools

JMP

Job description

NVIDIA has continuously reinvented itself over three decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities which are hard to solve, which only we can pursue, and which matter to the world. This is our life’s work: to amplify human inventiveness and intelligence. Make the choice to join us today. We are seeking an outstanding candidate for Silicon Reliability Engineer to drive and utilize cutting edge technologies to deliver high performance products while ensuring world class reliability.

What you will be doing:

• Work closely with wafer foundries and various functional groups such as Design, Advanced Technology Group and Operations to develop process reliability requirements for new technology nodes.
• Drive foundries for NVIDIA’s test vehicle qualifications and process reliability improvement before taping out new products and support product bring-ups and quals.
• Perform wearout reliability assessments and provide reliability guidance to design teams for Design for Reliability on the next generation products.
• Provide reliability Vmax, aging guardband guidelines to product teams and develop reliability methodology to optimize product reliability performance.
• Collaborate with foundries to plan and perform stress tests and build reliability models for extrinsic failure mechanisms.
• Interact with foundries for excursion materials and assess a reliability risk for disposition.

What we need to see:

• Deep understanding of cutting-edge semiconductor process technologies, reliability physics, and acceleration models.
• Familiar with wearout failure mechanisms (TDDB, BTI, HCI, EM, SM) and models, wafer level reliability tests, test structures, and industry standards (JEDEC, AEC).
• Proficient in reliability statistics, and hands on experience in failure rate calculations for early life, useful life and wearout period of reliability life curve.
• Good knowledge of semiconductor process defects/root causes, failure analysis and defect screening methodologies.
• Solid understanding in reliability degradation mechanisms in logic and memory circuits.
• Hands on skills in reliability data analysis, particularly using statistical tools such as JMP.
• Excellent written and verbal communication, and presentation skills.
• PhD or MS in Electrical Engineering, Physics, or a related major (or equivalent experience).
• 8+ years of overall experience in semiconductor reliability.

With competitive salaries and a generous benefits package, we are widely considered to be one of the technology world’s most desirable employers; we have some of the most forward-thinking and hardworking people in the world working for us and, due to unparalleled growth, best-in-class teams are rapidly growing. If you’re creative and autonomous with a real passion for your work, we want to hear from you!

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 200,000 USD - 322,000 USD for Level 5.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until July 27, 2026.

This posting is for an existing vacancy.

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.