Senior Silicon Product Engineer

Google; San Diego (CA); On-site; USD 156,000 - 229,000; Full time

Job summary

Join a leading tech company as part of a team that develops custom silicon solutions. You will leverage your expertise in VLSI technologies to innovate and enhance hardware experiences for millions. This role involves testing and validating SoC technologies, ensuring high performance and quality in production.

Qualifications

• 5 years of experience with VLSI technologies, product and test engineering.
• Experience with new technology nodes such as 3nm.

Responsibilities

• Develop and deploy test solutions using ATE for manufacturing.
• Collaborate with cross-functional teams to ensure optimal test coverage.

Skills

Problem Solving

Mentoring

Knowledge of VLSI

Knowledge of Machine Learning

Education

Bachelors degree in Electrical Engineering

Bachelors degree in Mechanical Engineering

Bachelors degree in Materials Science

Bachelors degree in Chemical Engineering

Tools

AdvanTest

UFlex

Job description

Mid

Experience driving progress, solving problems, and mentoring junior team members; deeper expertise and applied knowledge within relevant area.

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• Bachelor's degree in Electrical Engineering, Mechanical Engineering, Materials Science, Chemical Engineering, or a related field, or equivalent practical experience.
• 5 years of experience with Very-Large-Scale Integration (VLSI) technologies, product and test engineering, and semiconductor processing.
• Experience in Automated Test Equipment (ATE) or System-Level testing using AdvanTest or UFlex systems.
• Experience with new technology nodes such as 3nm.

Preferred qualifications:

• Experience with Machine Learning (ML) based automation to improve test cost, coverage, and quality in the Semiconductor Industry.
• Experience in System Level Testing using the Advantest platform.
• Experience with advanced packaging technologies such as 2.5D, InFO.
• Knowledge of process technology and its relation to design and testing data analysis.
• Experience with Design for Test (DFT) techniques and structural tests such as Scan/ATPG, JTAG, and memory Built-in Self Test (BIST), including testing sensors like PVT sensors, Temp sensors, etc.
• Knowledge of SERDES, PCIe, DDR, and Mixed-Signal circuits such as ADC, DAC, PLL, LDO, and their performance measurements.

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

In this role, you will help develop and deploy test solutions using Automatic Test Equipment (ATE) for manufacturing at Floating Action Button (FABs) outsourced assembly and test (OSATs) that meet the final product's performance and power specifications. You will help integrate System on a Chip (SoC) technologies into devices and facilitate ATE manufacturing testing of SoCs to validate performance and screen out devices. You will own all aspects of testing and collaborate with cross-functional teams to ensure optimal test coverage in production for high-quality SoCs. You will work with various groups to develop digital and mixed-signal tests, automation methodologies, and develop/support internal tools for test program generation, vector tracking, test program release, etc. Additionally, you will work on releasing cost-effective production test solutions into mass production.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines Google AI, Software, and Hardware to create helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to improve people's lives through technology.

The US base salary range for this full-time position is $156,000-$229,000 plus bonus, equity, and benefits. Salary ranges are determined by role, level, and location. Individual pay within the range depends on work location and factors such as skills, experience, and education. Your recruiter can share more about the specific salary range during the hiring process.

Note: The listed salary range reflects the base salary only and does not include bonus, equity, or benefits. Learn more about benefits at Google.

Responsibilities

• Perform SoC (AI-centric) product specifications and design for testing (DFT) architecture reviews and generate new product introduction (NPI) characterization, testing, and manufacturing plans.
• Support test hardware design requirements (e.g., probe card, load board), review ATE test programs, and strive for desired defect levels (DPPM).
• Perform die/package level bring-ups, troubleshoot failures, and collaborate with cross-functional teams to resolve issues.
• Characterize intrusion detection system (IDS), Vmin, and key KPIs, conduct reviews, and generate reports to meet AI performance and power goals.
• Support OSAT bring-up, timely ATE manufacturing test program releases, and meet cost and yield goals.

Google is proud to be an equal opportunity and affirmative action employer. We are committed to diversity, inclusion, and providing equal employment opportunities regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy, or related conditions. See Google's EEO Policy and related resources for more information.

As a global company, English proficiency is required for all roles unless otherwise specified.

To recruitment agencies: Google does not accept agency resumes. Please do not forward resumes to our jobs alias or employees. We are not responsible for fees related to unsolicited resumes.