Senior Silicon Power & Thermal Methodology Engineer

Nvidia Corporation

Santa Clara (CA)

On-site

USD 168,000 - 311,000

Full time

14 days+

Application generator

Turn this role into an interview — a resume and cover letter built around what this employer wants.

Get past ATS filters

Job summary

NVIDIA is looking for a senior engineer to lead power and thermal productization across ASIC/SoC bring-up. You will own methodology, test plans, and lab setups, while driving AI-enabled workflows for data analysis and decision-making.

You will collaborate across architecture, firmware, validation, and platform teams to ensure robust, scalable solutions. Ideal candidates have extensive post-silicon experience, strong tradeoff judgment, and a track record of delivering measurable improvements in

Qualifications

BS or MS in Electrical Engineering, Computer Engineering, or a related field, or equivalent experience.
8+ years of proven track record in post-silicon bring-up and validation of power and thermal features on sophisticated ASIC or SoC programs.
Strong end-to-end understanding of silicon behavior across architecture, firmware, validation, and platform interactions, with expertise in power and thermal domains.
Evidence of creating/improving characterization docs, debug tools, dashboards, or other reviewable technical artifacts.
Demonstrated ability to make sound tradeoff decisions across power, thermal, performance, firmware, design, validation, and schedule constraints.
Shown experience building or applying AI-enabled workflows for silicon characterization or validation, with measurable workflow impact and clear validation difficulty, observability, and guardrails.

Responsibilities

Lead the effort across multi-functional teams to keep the program's power and thermal productization strategy clear, executable, and on track.
Create methodology and silicon test plan based controller designs and architecture, including characterization process, debug tools, fuse/firmware settings and lab requirements.
Drive resolution for challenging silicon issues through structured hypotheses, measurement plans, and root-cause closure.
Steward the Power and Thermal playbook when the existing productization methodology does not fit the problem, creating new mitigations and assembling them as reusable methods.
Build AI-enabled workflows to automate data analysis, metric extraction, trend checks, and report generation across multiple bringups to improve, leverage, and shorten time to market.
Serve as a key technical owner for multi-functional decisions, issues, and tradeoffs related to feature bring-up.