Senior Silicon Failure Analysis Engineer (DFT/ATPG & Debug)

Intel Corporation; Hillsboro (OR); Hybrid; USD 142,000 - 269,000; Full time

Benefits offered by this job

Stock bonuses

Health benefits

Retirement plan

Paid vacation

Job summary

Intel Corporation is seeking an experienced Product Failure Analysis Engineer – SCAN Design for Test in Hillsboro, OR. The role focuses on root-cause analysis of silicon failures, leveraging DFT architectures, ATPG, scan diagnosis, and post-silicon debugging to accelerate ramp and quality of Intel Foundry products.

You will collaborate with design, test, process development, and manufacturing teams, develop innovative debugging tools, and drive continuous improvement in failure analysis

Qualifications

• Bachelor’s degree in electrical engineering or related STEM field with 6+ years hands-on experience.
• Hands-on experience with DFT tools and techniques, SCAN ATPG, and Scan Chain Diagnosis.
• Experience with fault isolation techniques and debug automation.

Responsibilities

• Lead Failure Analysis using lab equipment to isolate microscopic silicon failures and identify root causes.
• Drive cross-functional collaboration with test/validation engineers, designers, and manufacturing teams to resolve quality issues.
• Develop new debug tools, methodologies, and technologies to advance silicon debugging capabilities.
• Ensure design-for-debug features are incorporated for deep silicon isolation.
• Support continuous improvement with input on failure analysis investigations and process improvements.

Skills

DFT

ATPG

Scan Diagnosis

Post-silicon Debug

Root-cause Analysis

Cross-functional Collaboration

Education

Bachelor’s degree in electrical engineering

Master’s degree in electrical engineering

PhD in Electrical/Related STEM

Tools

Siemens Tessent

Synopsys TestMAX/TetraMAX

Verdi

DVE

Python

Perl

TCL

Job description

Intel Corporation is seeking an experienced Product Failure Analysis Engineer – SCAN Design for Test in Hillsboro, OR. The role focuses on root-cause analysis of silicon failures, leveraging DFT architectures, ATPG, scan diagnosis, and post-silicon debugging to accelerate ramp and quality of Intel Foundry products.

You will collaborate with design, test, process development, and manufacturing teams, develop innovative debugging tools, and drive continuous improvement in failure analysis