Senior FPGA Failure Analysis Engineer

191 Altera Corporation; San Jose (CA); On-site; USD 149,000 - 216,000; Full time

Job summary

Altera in San Jose, California, is seeking an experienced Failure Analysis Engineer to perform debug and root cause analysis of yield, reliability and customer returns on FPGA devices using advanced foundry process technologies.

The role requires partnering with IC/Package design, Foundry, Product and Reliability teams to drive non-destructive fault isolation using tools such as LVP, EMMI, OBIRCH, and layout/schematic analysis, with 8+ years in semiconductor FA.

Qualifications

• Bachelor's degree in Electrical Eng, Materials Science, Physics, Mechanical Engineering or related field.
• 8+ years of semiconductor failure analysis experience.
• Proficiency with FA tools (LVP, EMMI, OBIRCH) and DFT/logic fault localization.
• Experience with layout, schematic and design analysis tools.

Responsibilities

• Collaborate with Product/Yield/Reliability Engineers to drive electrical verification, and fault isolation during product development, yield improvement and reliability risk assessments.
• Support debug and fault isolation on customer returns.
• Define, execute and interpret fault isolation methods as appropriate to non-destructively isolate a failure using commercial testers and fault isolation tools.
• Proficient in independently using Emission microscopes, Laser Voltage Probing and OBIRCH tools.
• Experienced with layout, schematic and design analysis tools.
• Collaborate with physical failure analysis team on defect modes.

Skills

8+ years FA experience

DFT and logic fault localization

Root cause analysis

Education

Bachelor's degree in Electrical Eng, Materials Science, Physics, Mechanical Engineering or related field

Tools

LVP

EMMI

OBIRCH

Virtuoso

Avalon

SysNav

Job description

Altera in San Jose, California, is seeking an experienced Failure Analysis Engineer to perform debug and root cause analysis of yield, reliability and customer returns on FPGA devices using advanced foundry process technologies.

The role requires partnering with IC/Package design, Foundry, Product and Reliability teams to drive non-destructive fault isolation using tools such as LVP, EMMI, OBIRCH, and layout/schematic analysis, with 8+ years in semiconductor FA.