Senior Silicon Design Engineer – ASIC/RTL & Verilog

Advanced Micro Devices, Inc.; Santa Clara (CA); On-site; USD 180,000 - 240,000; Full time

Benefits offered by this job

AMD benefits at a glance

Job summary

Advanced Micro Devices, Inc. seeks a Senior SMTS Silicon Design Engineer in California to drive end-to-end ASIC design, verification and documentation. You will lead architecture decisions, define modules, and collaborate with cross-functional teams on complex chip projects.

The role requires a Master's degree in Electronics/Electrical/Computer Engineering or related field and 5 years of hands-on experience in silicon design, low-power techniques, and RTL/Verilog/VHDL flows. Travel is minimal.

Qualifications

• Master's degree or foreign equivalent in Electronics/Engineering.
• 5 years of related engineering experience required.
• Alternate combination includes a Bachelor's degree with 7+ years of post-baccalaureate experience.

Responsibilities

• Lead definition, design, verification, and documentation for ASIC development.
• Define module interfaces and formats for simulation.
• Drive multidimensional designs including layout of complex ICs.
• Collaborate with cross‑functional teams to address high‑impact issues.

Skills

Post silicon debugging

Low power design

Hardware verification

Logic and circuit design

SOC and system architecture

RTL Design and coding

Verilog and VHDL

System Verilog

Functional Behavior Models

Microarchitecture specifications

ASIC Design and design flows

Education

Master's degree in Electronics Engineering, Computer Engineering, Electrical Engineering or related field

Bachelor's degree in Electronics Engineering, Computer Engineering, Electrical Engineering or related field with 7+ years experience

Job description

Advanced Micro Devices, Inc. seeks a Senior SMTS Silicon Design Engineer in California to drive end-to-end ASIC design, verification and documentation. You will lead architecture decisions, define modules, and collaborate with cross-functional teams on complex chip projects.

The role requires a Master's degree in Electronics/Electrical/Computer Engineering or related field and 5 years of hands-on experience in silicon design, low-power techniques, and RTL/Verilog/VHDL flows. Travel is minimal.