Senior Signal Integrity Engineer – PAM4 SerDes Expert
Hewlett Packard Enterprise Development LP
Sunnyvale (CA)
On-site
USD 174,000 - 352,500
Full time
14 days+
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Benefits offered by this job
Health & Wellbeing benefits
Personal & Professional Development programs
Job summary
Hewlett Packard Enterprise Development LP is seeking a Signal Integrity Engineer in Sunnyvale, California. This position emphasizes collaborating with an experienced team to perform high-speed ASIC design and analysis for cutting-edge networking products. Ideal candidates will have a strong background in Signal Integrity with a minimum of 10 years of experience, particularly with 56G/112G ASIC PAM4 technologies. The role requires onsite presence and offers comprehensive benefits for health, wellbeing, and professional development.
Qualifications
10+ years of experience in Signal Integrity analysis.
Experience with 200G ASIC PAM4 design desired.
Proficient with CAD tools and lab equipment.
Responsibilities
Perform COM and develop channel simulation models.
Correlate simulation results with measurements.
Conduct PCB timing analysis and implement SI rules.
Skills
Signal Integrity analysis experience
Experience with 56G/112G ASIC PAM4 SerDes technologies
Hands-on experience with lab equipment
Debugging and solutions for channel performance issues
Education
Bachelor’s degree in Electrical engineering or related field
Master’s degree in Electrical engineering or related field
Tools
Ansys HFSS
Allegro
MATLAB
Job description
Hewlett Packard Enterprise Development LP is seeking a Signal Integrity Engineer in Sunnyvale, California. This position emphasizes collaborating with an experienced team to perform high-speed ASIC design and analysis for cutting-edge networking products. Ideal candidates will have a strong background in Signal Integrity with a minimum of 10 years of experience, particularly with 56G/112G ASIC PAM4 technologies. The role requires onsite presence and offers comprehensive benefits for health, wellbeing, and professional development.