Senior Serdes System Architect, 100G+

Broadcom; Austin (TX); On-site; USD 108,000 - 192,000; Full time

Benefits offered by this job

Discretionary annual bonus

Employee Stock Purchase Program

401(K) with company matching

Paid sick leave and vacation time

Job summary

A leading semiconductor company in Austin is seeking a DSP/System Design Engineer to work on high-speed Serdes products. The role involves designing advanced signal processing algorithms, developing simulation models, and collaborating with design teams. The ideal candidate has a B.S.E.E. or M.S.E.E. with relevant experience, demonstrating expertise in digital signal processing and communication theory. This position offers a competitive salary between $108,000 and $192,000, along with a comprehensive benefits package.

Qualifications

• 8+ years of experience with B.S.E.E. or 6 years with M.S.E.E.
• Experience in designing high-speed Clock and Data Recovery (CDR) PLLs is a plus.
• Knowledge of IEEE 802.3/OIF Serdes standards is a plus.

Responsibilities

• Develop channel models and run simulations for Serdes architecture.
• Document signal processing block requirements and lab test plans.
• Develop and run system-level simulation suites for architectural evaluations.

Skills

Communication Theory

Digital Signal Processing

MATLAB

C/C++ programming

Lab skills

Education

B.S.E.E. or M.S.E.E.

Job description

A leading semiconductor company in Austin is seeking a DSP/System Design Engineer to work on high-speed Serdes products. The role involves designing advanced signal processing algorithms, developing simulation models, and collaborating with design teams. The ideal candidate has a B.S.E.E. or M.S.E.E. with relevant experience, demonstrating expertise in digital signal processing and communication theory. This position offers a competitive salary between $108,000 and $192,000, along with a comprehensive benefits package.