Senior Semiconductor Process Integration Lead - Yield & Ramp

Raxium; Fremont (CA); On-site; USD 180,000 - 240,000; Full time

Job summary

Raxium is seeking an experienced engineering leader in Fremont, CA to drive semiconductor process integration and yield improvements across end-to-end module interactions. The candidate will guide cross-functional teams through transitions to high-volume manufacturing and work with advanced material sets and integration schemes such as GaN on Si and CMOS technologies.

A Master’s degree and 7+ years in the field are required.

Qualifications

• Master’s degree or equivalent practical experience in EE, materials science, chemical engineering, or physics.
• 7 years in semiconductor process integration or yield engineering with SPC, defectivity analysis, wafer-level testing.
• 4 years leading cross-functional teams through transitions to high-volume manufacturing.
• Experience with GaN on Si, compound semiconductors, and advanced CMOS integration.

Education

Master’s degree in Electrical Engineering, Materials Science, Chemical Engineering, Physics, a related field, or equivalent practical experience.

7 years of experience with semiconductor process integration or yield engineering (i.e., end-to-end module interactions, systematic yield improvement, defectivity analysis/reduction, parametric centering, wafer-level test/analysis, fab-wide Statistical Process Control (SPC), line disposition protocols, etc.).

4 years of experience with people management leading cross-functional engineering teams through semiconductor product transitions (i.e. early manufacturing flows to high volume manufacturing).

Experience with advanced materials sets, devices and integration schemes (i.e., GaN on Si electronics, compound semiconductor optoelectronics, advanced CMOS integration, etc.).

Job description

Raxium is seeking an experienced engineering leader in Fremont, CA to drive semiconductor process integration and yield improvements across end-to-end module interactions. The candidate will guide cross-functional teams through transitions to high-volume manufacturing and work with advanced material sets and integration schemes such as GaN on Si and CMOS technologies.

A Master’s degree and 7+ years in the field are required.