Senior RTL Optimization CAD Engineer - Equity Options

NVIDIA; Austin (TX); On-site; USD 136,000 - 218,500; Full time

Benefits offered by this job

Equity participation

Comprehensive benefits package

Job summary

NVIDIA is seeking a CAD Software Engineer in Austin, Texas, to innovate methods for RTL quality, timing, and power optimization. Ideal candidates will have a strong foundation in C++ programming and a passion for high-performance hardware development.

This role emphasizes the application of parallel computing, machine learning, and graph-based algorithms to enhance hardware design productivity. Join NVIDIA and be part of a company known for GPU and AI technology excellence.

Qualifications

• 3+ years of experience in CAD software and VLSI hardware design.
• Familiarity with RTL design and hardware design concerns.
• Experience with common EDA building blocks.

Responsibilities

• Invent new methods for parallel, graph-based RTL traversal and analysis.
• Devise strategies for analyzing RTL changes on data path latency.
• Explore the use of machine learning models for RTL modifications.

Skills

C++ programming

Algorithm development

VLSI hardware design

Graph traversal

Machine learning techniques

Education

MS or PhD in Electrical Engineering or Computer Science

Tools

Verilog

SystemVerilog

EDA tools

Job description

NVIDIA is seeking a CAD Software Engineer in Austin, Texas, to innovate methods for RTL quality, timing, and power optimization. Ideal candidates will have a strong foundation in C++ programming and a passion for high-performance hardware development.

This role emphasizes the application of parallel computing, machine learning, and graph-based algorithms to enhance hardware design productivity. Join NVIDIA and be part of a company known for GPU and AI technology excellence.