Senior RTL Memory Architect for AI/HPC Systems

Samsung Semiconductor

San Jose (CA)

On-site

USD 163,000 - 253,000

Full time

14 days+

Get more replies from employers

Send a job-specific resume in minutes.

Benefits offered by this job

4+ weeks of paid time off
Medical/Dental/Vision benefits
401k plan
Charitable giving match
Onsite Café and gym

Job summary

Samsung Semiconductor is seeking a Senior Engineer for RTL Memory Centric Computing in San Jose, CA. The role focuses on developing and optimizing memory-centric computing systems, requiring strong expertise in RTL development and microarchitecture. Candidates should have 10+ years of experience, excellent problem-solving and communication skills. The position offers a flexible work policy, alongside comprehensive benefits including generous paid time off and emotional wellness support.

Qualifications

  • Strong background in microarchitecture and computer architecture.
  • Experience in front-end design methodology involving RTL development for complex IPs.
  • Ability to work independently and as part of a team.

Responsibilities

  • Develop IP for memory-centric computing systems using Verilog, SystemVerilog and HLS.
  • Optimize the IP for performance and power using advanced techniques.
  • Collaborate with Verification engineers to design and develop test plans.

Skills

Microarchitecture and computer architecture
RTL development
Memory Controller design
AI/ML workloads
Problem-solving skills
Communication skills

Education

Bachelor's with 10+ years or Master's with 8+ years or PhD with 5+ years of industry experience

Job description

Samsung Semiconductor is seeking a Senior Engineer for RTL Memory Centric Computing in San Jose, CA. The role focuses on developing and optimizing memory-centric computing systems, requiring strong expertise in RTL development and microarchitecture. Candidates should have 10+ years of experience, excellent problem-solving and communication skills. The position offers a flexible work policy, alongside comprehensive benefits including generous paid time off and emotional wellness support.
Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

Senior RTL Memory-Centric Systems Engineer
Senior RTL Memory-Centric Systems Engineer

Samsungsemiconductor • San Jose (CA)

On-site
USD 163,000 - 253,000
Flexible Work Environment
Health and Wellness Benefits
Generous Paid Time Off
Senior RTL Engineer: Memory-Centric AI/ML IP Design
Senior RTL Engineer: Memory-Centric AI/ML IP Design

Samsung Semiconductor Inc. • San Jose (CA)

On-site
USD 138,000 - 206,000
Senior RTL Engineer: Memory-Centric AI/ML IP
Senior RTL Engineer: Memory-Centric AI/ML IP

Socket.dev • San Jose (CA)

On-site
USD 138,000 - 206,000
Charitable giving match
Paid time off 4+ weeks
Fertility/adoption stipend
+3
Senior RTL IP Engineer - Memory-Centric AI/ML
Senior RTL IP Engineer - Memory-Centric AI/ML

Samsung Semiconductor • San Jose (CA)

On-site
USD 138,000 - 206,000
4+ weeks PTO
Onsite Café & gym
Fertility care stipend
+4
Senior RTL Engineer – Memory-Centric IP for AI/ML
Senior RTL Engineer – Memory-Centric IP for AI/ML

Samsungsemiconductor • San Jose (CA)

On-site
USD 124,000 - 206,000
Give Back
Enjoy Time Away
Care for Family
+3
Senior RTL Design Engineer — Memory Subsystems for AI
Senior RTL Design Engineer — Memory Subsystems for AI

IC Resources • San Francisco (CA)

On-site
USD 190,000 - 230,000
Staff RTL Design Engineer for FPGA Prototypes in Memory
Staff RTL Design Engineer for FPGA Prototypes in Memory

Samsungsemiconductor • San Jose (CA)

On-site
USD 163,000 - 253,000
4+ weeks of paid time off
Medical/Dental/Vision/401k
Charitable giving match
+1
Senior RTL Design Engineer for Data Center Innovations
Senior RTL Design Engineer for Data Center Innovations

Samsungsemiconductor • San Jose (CA)

On-site
USD 138,000 - 206,000
Medical/Dental/Vision benefits
401(k) plan
4+ weeks paid time off
+1
Senior Memory-Centric SoC Physical Designer
Senior Memory-Centric SoC Physical Designer

Samsungsemiconductor • San Jose (CA)

On-site
USD 138,000 - 206,000
PTO 4+ weeks
Health insurance
401k match
+1
Lead RTL/SoC Design Engineer for AI/Memory ASICs
Lead RTL/SoC Design Engineer for AI/Memory ASICs

TetraMem - Accelerate The World • San Jose (CA)

On-site
USD 110,000 - 300,000