Senior RTL Engineer: CPU Design & PPA

Tenstorrent Inc.; Austin, Santa Clara (TX, CA); Hybrid; USD 100,000 - 500,000; Full time

Job summary

Tenstorrent Inc. in Austin, TX or Santa Clara, CA, seeks an engineer to join the CPU design team to iterate front-end CAD flows across process technologies while refining core configurations with DV, PD, RTL and performance teams to deliver a functional, timing, and power-converged CPU design.

The role welcomes candidates at various experience levels; compensation aligns with level; the position is hybrid based in Austin or Santa Clara, and Tenstorrent is an equal opportunity employer.

Qualifications

• Experienced in high-performance physical design.
• Proficient in RTL coding (Verilog/VHDL) and sim/power-analysis tools.
• Skilled in synthesis, place-and-route flows and physical design methods.
• Background in CPU micro-architecture.

Responsibilities

• Perform synthesis and initial place and route for new and legacy designs.
• Collaborate with core micro-architects to optimize core configurations for PPA.
• Use techniques to optimize power, performance, and area during physical design experiments.
• Improve physical design environment, tools, and methodologies.

Skills

High-performance physical design

RTL coding Verilog/VHDL

Synthesis & place-and-route

CPU micro-architecture

Tools

Simulation tools

Power analysis tools

Job description

Tenstorrent Inc. in Austin, TX or Santa Clara, CA, seeks an engineer to join the CPU design team to iterate front-end CAD flows across process technologies while refining core configurations with DV, PD, RTL and performance teams to deliver a functional, timing, and power-converged CPU design.

The role welcomes candidates at various experience levels; compensation aligns with level; the position is hybrid based in Austin or Santa Clara, and Tenstorrent is an equal opportunity employer.