Senior RTL Design Engineer - FPGA & Memory IP

Samsung Semiconductor Inc.

San Jose (CA)

On-site

USD 138,000 - 206,000

Full time

14 days+

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Benefits offered by this job

Medical/Dental/Vision/401k
Wellness programs
Flexible time off
Family support
Emotional wellness resources
Fitness opportunities

Job summary

Samsung Semiconductor, Inc. in San Jose, CA is seeking a senior RTL/FPGA-focused engineer to design and verify RTL IP, bring up hardware boards, and collaborate with software teams on Linux/Windows drivers. You will work across geographies on high‑performance memory interfaces and next‑gen storage controller features.

The role requires hands-on lab work, strong HDL experience with Verilog and CAD tools, and excellent communication skills to meet deadlines in a collaborative environment.

Qualifications

  • BS with 5 years of RTL Development, MS with 3 years, or Ph.D. in Computer/Electrical Engineering.
  • Familiarity with FPGA design tool flows, synthesis, timing analysis, partitioning, FPGA bring-up and testing.
  • HDL development experience: Verilog, synthesis, sim, test benches, and CAD tools (Synopsys, Mentor, Cadence).
  • Hands-on hardware board bring-up, server and software integration experience.
  • Experience with PCIe, CXL, NVMe, AXI, DDR4/5, Ethernet protocols.
  • Strong verbal and written communication, attention to detail, and ability to meet deadlines.
  • Ability to work with cross-functional teams across geographies; collaborative and inclusive mindset.
  • Curiosity and resilience; data-driven approach to problem solving.

Responsibilities

  • Microarchitecture, RTL design, and verification.
  • Develop new RTL IP for high performance PoCs.
  • Lab bring-up, lab test and validation of RTL IPs.
  • Research next generation memory and storage controller features.
  • Research emerging technology standards.
  • Collaborate with hardware/software architects on FPGA prototypes and feasibility studies.
  • Assist software architects developing Linux/Windows device drivers, testing and debugging.
  • Participate in value proposition studies, publish papers, and file patents.
  • Complete other responsibilities as assigned.

Skills

RTL development
FPGA bring-up
Verbal and written communication

Education

BS with 5 years RTL Development, MS with 3 years, or Ph.D. in Computer/Electrical Engineering

Tools

Verilog HDL
Synthesis
Simulation
Test benches
CAD tools (Synopsys, Mentor, Cadence)

Job description

Samsung Semiconductor, Inc. in San Jose, CA is seeking a senior RTL/FPGA-focused engineer to design and verify RTL IP, bring up hardware boards, and collaborate with software teams on Linux/Windows drivers. You will work across geographies on high‑performance memory interfaces and next‑gen storage controller features.

The role requires hands-on lab work, strong HDL experience with Verilog and CAD tools, and excellent communication skills to meet deadlines in a collaborative environment.

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