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Senior/Principal Digital Design Engineer

Idaho Scientific

Salt Lake City (UT)

On-site

USD 100,000 - 130,000

Full time

2 days ago
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Job summary

A leading technology firm seeks skilled engineers to develop secure system solutions. Join a dynamic team focused on optimizing performance and security through innovative designs. Ideal candidates will have a strong technical background and a commitment to quality.

Benefits

Competitive Pay
Flexible Work Schedule
Health Benefits and Insurance
Retirement fund contributions
Profit Sharing
Generous Paid Time Off Policy

Qualifications

  • At least 5 years of experience in FPGA or ASIC product development.
  • Proven work experience designing and fabricating an ASIC.

Responsibilities

  • Collaborate with team leaders to identify problems and solutions.
  • Develop microarchitecture of new Idaho Scientific IP.
  • Implement and simulate IP blocks in RTL.

Skills

Problem Solving
Communication
Analytical Skills
Attention to Detail

Education

Degree in Computer Engineering
Degree in Computer Science
Degree in Electrical Engineering

Tools

SystemVerilog
VHDL

Job description

Life is Short. Solve Hard Problems with Cool People.
Idaho Scientific is the Goldilocks of technology firms, combining the spirit and growth of a startup, with a financial footing and safety of a stable corporation. The perks of working at Idaho Scientific include all the benefits you’d expect from an employer who prioritizes a balanced human experience:
  • Competitive Pay
  • Flexible Work Schedule
  • Health Benefits and Insurance
  • Retirement fund contributions
  • Profit Sharing
  • Generous Paid Time Off Policy
Solve the Problem, Not the Symptom.
Idaho Scientific designs and deploys secure system solutions through novel CPU design, crypto cores, purpose-built system-on-a-chip architectures and hardened operating systems. Our solutions are the foundation for how military systems and US critical infrastructure will remain safe and secure through unpredictable operating environments of the future.We need smart people like you to join us in solving hard problems that matter.

What You'll Get To Do:
  • Collaborate with team leaders to explore and clearly identify real problems and solutions.
  • Develop and define the microarchitecture of new Idaho Scientific IP to optimize performance, I/O, power consumption, area utilization, recurring cost and security functions.
  • Implement and simulate IP blocks in RTL using SystemVerilog, VHDL, and other languages.
  • Integrate complex systems that instantiate both Idaho Scientific and third party IP.
  • Contribute to all aspects of design success from specification to production.
  • Apply our state-of-the-art IP to ASIC and FPGA products in the real world.
  • Define and improve high-quality design methods and processes.
  • Mentor and guide other ASIC design engineers.
Required Qualifications & Experience
  • US Citizenship (no exceptions)
  • Proven work experience designing and fabricating an ASIC (no exceptions)
  • Ability to get a security clearance
  • Solid technical background with at least 5 years of experience in FPGA or ASIC product development
  • Ability to communicate clearly in person and in written documentation
  • Degree in Computer Engineering, Computer Science, Electrical Engineering or related field
  • In-depth knowledge and experience with digital architectures and design methods such as RTL coding, synthesis, place-and-route, timing closure, constrained-random and formal verification
  • Strong analytical and problem solving skills
  • Extreme attention to detail
  • A willingness to roll up one’s sleeves to get the job done
  • Skilled at working effectively with cross functional teams
Preferred Qualifications & Experience
  • US Security Clearance, Active or current within the last two years
  • In-depth understanding of microprocessor architectures
  • Working knowledge of applied cryptography and cyber security topics
  • Experience applying principles of cyber security to operational technology and embedded systems
  • Experience with SystemVerilog, VHDL, and Test-Driven Development principles
Location
  • The preferred work location is at Idaho Scientific headquarters in Boise, Idaho or in Salt Lake City, Utah
Commitment to Diversity.
Idaho Scientific is an equal employment opportunity employer. Qualified applicants will not be discriminated against due to race, color, creed, sex, sexual orientation, gender identity or expression, age, religion, national origin, citizenship status, disability, ancestry, marital status, veteran status, medical condition including pregnancy, or any protected category prohibited by local, state or federal laws.
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