Senior Power SiP & Flip-Chip Packaging Engineer

Renesas Electronics; Tempe (AZ); Hybrid; USD 100,000 - 130,000; Full time

Benefits offered by this job

Flexible work environment

Employee Resource Groups

Career advancement opportunities

Job summary

A leading semiconductor solutions provider in Tempe, Arizona is seeking an experienced engineer to design and develop packaging methods for various applications, including automotive and industrial power. The ideal candidate must possess a relevant degree and 10-15 years of experience in package development, particularly in power SiP/modules. This position offers a hybrid working model, providing flexibility and opportunities for professional growth within an innovative team environment.

Qualifications

• 10-15 years of relevant experience in package development emphasizing power SiP/module and wafer level packaging.
• Strong understanding of assembly process knowledge, qualification methods, and statistical analysis software.
• Strong interpersonal and analytical skills.

Responsibilities

• Design and develop package and interconnect methods for packaging needs.
• Qualify packaging technologies for consumer and industrial power applications.
• Resolve process integration issues and ensure quality controls.

Skills

Power SiP/module packaging

Communication skills

Analytical skills

Education

Doctorate/Masters/Bachelor’s Degree in relevant engineering

Job description

A leading semiconductor solutions provider in Tempe, Arizona is seeking an experienced engineer to design and develop packaging methods for various applications, including automotive and industrial power. The ideal candidate must possess a relevant degree and 10-15 years of experience in package development, particularly in power SiP/modules. This position offers a hybrid working model, providing flexibility and opportunities for professional growth within an innovative team environment.