Senior Physical Design Execution Lead

191 Altera Corporation

San Jose (CA)

On-site

USD 232,000 - 341,000

Full time

4 days ago
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Job summary

Altera is seeking a senior Physical Design Lead — Execution to drive day‑to‑day physical design execution, from floorplanning to tapeout, across blocks and full-chip integration. The role demands ownership of schedule and quality, with the ability to coordinate multiple design teams and resolve conflicts under pressure.

The position focuses on mentorship, customer engagement, and advancing to full-chip implementation ownership, while maintaining tight schedules and signoff readiness.

Qualifications

  • Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, or related field with 15+ years physical design experience for Sr. Principal or 12+ for Principal.
  • Strong track record delivering on schedule and quality across blocks and full chip.
  • Hands-on experience with floorplanning, placement, clock-tree synthesis, routing, timing/power closure and signoff.
  • Production physical design execution at advanced nodes with direct tapeout ownership.

Responsibilities

  • Drive day-to-day physical design execution from floorplan through tapeout across blocks and full-chip integration.
  • Own the schedule and quality bar for physical design execution and mitigate risks.
  • Coordinate cross-block execution and resolve conflicts to keep full-chip closure on track.
  • Mentor engineers and engage senior customer stakeholders with credibility and diplomacy.

Skills

Physical design
Schedule management
Customer engagement
Mentorship
Tapeout experience
Cross-block coordination
Problem solving

Education

Bachelor's / Master’s / PhD in Electrical Engineering or Computer Engineering

Tools

Synopsys Fusion Compiler
ICC2
PrimeTime
Cadence Innovus
Tempus
Voltus
Ansys RedHawk-SC
Calibre

Job description

Altera is seeking a senior Physical Design Lead — Execution to drive day‑to‑day physical design execution, from floorplanning to tapeout, across blocks and full-chip integration. The role demands ownership of schedule and quality, with the ability to coordinate multiple design teams and resolve conflicts under pressure.

The position focuses on mentorship, customer engagement, and advancing to full-chip implementation ownership, while maintaining tight schedules and signoff readiness.

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