Senior Physical Design Engineer — Timing & STA Expert

Tenstorrent; Colorado; Hybrid; USD 100,000 - 500,000; Full time

Job summary

Tenstorrent seeks a mid- to senior-level Physical Design Engineer with a strong STA background to converge multi-million-gate designs on advanced nodes and signoff through tapeout. You will collaborate across software, architecture, and DFT teams, driving timing strategies in a hybrid role based in Austin, TX; Fort Collins, CO; or Santa Clara, CA.

Ideal candidates have 8+ years in STA, timing closure, and advanced-node design, with proficiency in Python/Perl/Tcl automation and a proven track

Qualifications

• 8+ years of experience in STA, timing closure, and advanced-node design implementation.
• Experience with timing flows, constraints, clocking, CDC/RDC, derates, guardbanding and final signoff.
• Skilled at writing/debugging SDC constraints, ECOs, closure strategies, and worst-case corners.
• Strong collaborator who can drive results across distributed cross-functional teams.

Responsibilities

• Drive timing convergence across blocks, partitions, sections, and top-level designs; publish results.
• Analyze timing violations, develop fixes, debug timing-flow issues, and progress to tapeout.
• Develop and validate bottom-up constraints with Design and DFT teams on methodology updates.
• Use Python, Perl, and Tcl for automation; experience with SPICE, PNR, CTS, routing, DFT or AI-based automation is a plus.

Skills

Static timing analysis

Timing closure

Advanced-node design

Python scripting

SPICE

PNR

Clocking

Cross-functional collaboration

Tools

SPICE

PNR

Placement

CTS

Routing

DFT

AI-based automation

Job description

Tenstorrent seeks a mid- to senior-level Physical Design Engineer with a strong STA background to converge multi-million-gate designs on advanced nodes and signoff through tapeout. You will collaborate across software, architecture, and DFT teams, driving timing strategies in a hybrid role based in Austin, TX; Fort Collins, CO; or Santa Clara, CA.

Ideal candidates have 8+ years in STA, timing closure, and advanced-node design, with proficiency in Python/Perl/Tcl automation and a proven track