Senior Package Engineer: ASIC & Memory Packaging Architect

Micron Technology, Inc.; Boise (ID); On-site; USD 143,000 - 398,000; Full time

Benefits offered by this job

Medical, dental & vision plans

Paid time off

Paid holidays

Job summary

Micron Technology, Inc. in Boise, Idaho, seeks a Product Development Engineer 5 - Hardware Engineering MTS to lead package architecture initiatives and drive next-generation memory solutions.

You will partner with system architects, develop block diagrams and netlists, and support ASIC/package co-design, while advancing interfaces like PCIe, DDR, and LPDDR. This role offers a comprehensive benefits package and strong growth.

Qualifications

• Bachelor's degree and 10+ years in hardware design or equivalent.
• Experience with block diagrams, schematics, and electrical requirements.
• Familiarity with NAND flash memory and storage systems.

Responsibilities

• Define package architecture, connectivity, and electrical requirements with System Architects and engineering teams.
• Develop block diagrams, schematics, and logical connectivity for system-in-package designs.
• Create and verify package netlists using schematic and automation-based design flows.
• Support ASIC/package co-design, including pad/bump maps and connectivity.
• Evaluate package designs for electrical performance, manufacturability, reliability, and system requirements.
• Collaborate with Package Design and SI/PI teams to support physical and electrical implementation.
• Support integration of memory, ASICs/controllers, and other devices in complex package architectures.
• Support new protocols such as LPDDR/DDR, ONFI, UFS, PCIe and other high-speed interfaces.

Skills

System architecture knowledge

NAND flash memory familiarity

Cross-functional leadership

Education

Bachelor's degree in Electrical/Computer/Mechanical Engineering

Tools

Cadence Allegro System Capture

Synopsys Design Compiler

Mentor Graphics PADS

Altium Designer

OrCAD

Job description

Micron Technology, Inc. in Boise, Idaho, seeks a Product Development Engineer 5 - Hardware Engineering MTS to lead package architecture initiatives and drive next-generation memory solutions.

You will partner with system architects, develop block diagrams and netlists, and support ASIC/package co-design, while advancing interfaces like PCIe, DDR, and LPDDR. This role offers a comprehensive benefits package and strong growth.